X9530V14IZ Datasheet X9530V14IZ, X9530V14I, X9530V14IT1 | P19-P21

FN8211.1

November 11, 2005

The four registers Control 1 through 4, have a

nonvolatile and a volatile cell for each bit. At power-up,

the content of the nonvolatile cells is automatically

recalled and written to the volatile cells. The content of

the volatile cells controls the X9530’s functionality. If

bit NV1234 in the Control 0 register is set to “1”, a

Write operation to these registers writes to both the

volatile and nonvolatile cells. If bit NV1234 in the

Control 0 register is set to “0”, a Write operation to

these registers only writes to the volatile cells. In both

cases the newly written values effectively control the

X9530, but in the second case, those values are lost

when the part is powered down.

If bit NV1234 is set to “0”, a Byte Write operation to

Control registers 0 or 5 causes the value in the

nonvolatile cells of Control registers 1 through 4 to be

recalled into their corresponding volatile cells, as

during power-up. This doesn’t happen when the WP

pin is LOW, because Write Protection is enabled. It is

generally recommended to configure Control registers

0 and 5 before writing to Control registers 1 through 4.

When reading any of the control registers 1, 2, 3, or 4,

the Data Bytes are always the content of the

corresponding nonvolatile cells, even if bit NV1234 is

"0" (See “Control and Status Register Format”).

Read Operation

A Read operation consist of a three byte instruction

followed by one or more Data Bytes (See Figure 19).

The master initiates the operation issuing the following

sequence: a START, the Slave Address byte with the

R/W

bit set to “0”, an Address Byte, a second START,

and a second Slave Address byte with the R/W

bit set

to “1”. After each of the three bytes, the X9530

responds with an ACK. Then the X9530 transmits

Data Bytes as long as the master responds with an

ACK during the SCL cycle following the eigth bit of

each byte. The master terminates the read operation

(issuing a STOP condition) following the last bit of the

last Data Byte (See Figure 19).

5 bytes

7 bytes

Address=6

5 bytes

Address Pointer

Address=15

Address=11

Ends Up Here

Address=7

Address=0

Figure 17. Example: Writing 12 bytes to a 16-byte page starting at location 11.

Signals from

the Master

Signals from

the Slave

Signal at SDA

Slave

Address

Byte = 81h

100

Data Byte for

Control 1

Data Byte for

Control 4

Write

000

Four Data Bytes

Figure 18. Writing to Control Registers 1, 2, 3, and 4

X9530

FN8211.1

November 11, 2005

The Data Bytes are from the memory location indicated

by an internal pointer. This pointer initial value is

determined by the Address Byte in the Read operation

instruction, and increments by one during transmission of

each Data Byte. After reaching the memory location

10Fh the pointer “rolls over” to 00h, and the device

continues to output data for each ACK received.

A Read operation internal pointer can start at any

memory location from 00h through FEh, when the

Address Byte is 00h through FEh respectively. But it

starts at location 100h if the Address Byte is FFh.

When reading any of the control registers 1, 2, 3, or 4,

the Data Bytes are always the content of the

corresponding nonvolatile cells, even if bit NV1234 is

"0" (See “Control and Status Register Format”).

Data Protection

There are four levels of data protection designed into

the X9530: 1- Any Write to the device first requires

setting of the WEL bit in Control 6 register; 2- The

Block Lock can prevent Writes to certain regions of

memory; 3- The Write Protection pin disables any

writing to the X9530; 4- The proper clock count, data bit

sequence, and STOP condition is required in order to

start a nonvolatile write cycle, otherwise the X9530

ignores the Write operation.

: Write Protection Pin

When the Write Protection (WP

) pin is active (LOW),

any Write operations to the X9530 is disabled, except

the writing of the WEL bit.

Signals

from the

Master

Signals from

the Slave

Signal at

SDA

Slave

Address

with

R/W

= 0

Address

Byte

100

Slave

Address

with

R/W

= 1

Last Read

Data Byte

First Read

Data Byte

Figure 19. Read Sequence

X9530

FN8211.1

November 11, 2005

APPLICATIONS INFORMATION

Temperature Sensing

The X9530’s on-chip temperature sensor functions

similarly to other semiconductor temperature sensors.

The surface mount package (TSSOP) and the Chip

Scale Package both allow good thermal conduction

from the PC board to the die, so the X9530 will provide

an accurate measure of the temperature of the board.

If there is no ambient air movement over the device

package or the board, then the measured temperature

will be very close to that of the board. If there is air

movement over the package and the air temperature

is substantially different from that of the PC board,

then the measured temperature will be at a value

between that of the board and the air. If the X9530 is

intended to sense the temperature of a particular

component on the board, the X9530 should be located

as close as possible to that component to minimize

contributions from other devices or the differential

temperatures across the board.

X9530 LASER DIODE BIAS APPLICATION

EXAMPLE

The X9530 is ideally suited to the control of temperature

sensitive parameters in fiber optic applications. Figure

20 shows the typical topology of a laser driver circuit

used in many fiber optic transceiver modules.

This example uses a common anode connected Laser

Diode (LD), in conjunction with a PIN Monitor Photo-

Diode (MPD). The laser diode current (I

) is a

summation of the Bias Current (I

BIAS

), Modulation

Current (I

MOD

) and the Automatic Power Control (APC)

error signal current (I

MON

). The APC circuit uses the

MPD current (I

MON

) as an input, and ensures that a

constant average optical power output of the LD is

maintaned. The modulation circuitry is driven by an

external high speed data source.

Typical control parameters of a LD driver circuit such

as the one shown in Figure 20 may be:

– I

MODSET

: Sets the I

MOD

level,

– I

BIASSET

: Sets the I

BIAS

level,

– I

PINSET

: Sets the average optical power output.

Figure 21 shows how the X9530 may be used to

control these parameters while providing accurate

temperature compensation.

In this example the I1 output of the X9530 drives the

MODSET

input of the laser diode circuit. By loading the

appropriate values into the look-up table (LUT1) of the

device, it can dynamically change the modulation

current of the driver circuit. This may be used to

compensate for the effect of reduced laser light output

at elevated temperatures.

Depending upon the type of driver circuit used, the I2

output of the X9530 may be used to control either

BIASSET

or I

PINSET

parameters. The example in Figure

21 uses I2 to control the I

PINSET

parameter, while

BIASSET

is set at a fixed value using a Intersil Digital

potentiometer.

Similar to the control of the modulation current, I2 may

be used to compensate for changes in I

MON

over

temperature. By loading the appropriate values into

the look-up table (LUT2) of the device, this would have

the effect of dynamically controlling the average

optical power output of the LD (via the APC circuit)

over temperature.

The lookup table values for this fiber optic application

could be determined in two ways. One way is to use

well-defined data for LD and monitor photo diode drift

over temperature, and calculate the appropriate I1 and

I2 values needed at each temperature setting. Another

way is to test the assembled module over temperature

and load values into the tables at each setting. This

will require APC on/off control to determine each

MODSET value. See Intersil application note AN156

for a full design analysis with LD driver application.

If design requirements are such that no temperature

compensation is necessary for the average optical

power output of the LD, then the I2 output pin could be

used to set the bias current. I

BIASET

of the driver circuit

may be controlled by I2 of the X9530, and the same

current level could be set with control 4 register. This

would provide a constant (temperature independant)

setting for the bias current.

As previously described, the X9530 also contains

general purpose EEPROM memory which may be

accessed by the 2 wire serial bus. In the case of

pluggable fiber optic applications such as GBIC, SFP

or SFF this memory may be used for the storage of

transceiver module parameters.

X9530

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27 P28-P29

X9530V14IZ

Mfr. #:

Buy X9530V14IZ

Manufacturer:

Renesas / Intersil

Description:

Laser Drivers TEMP COMPENSATION LASER DIODE BIAS CNT

Lifecycle:

New from this manufacturer.

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X9530V14IZ

X9530V14IZ

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