22
FN8211.1
November 11, 2005
Modulation
Currrent
Generation
Bias
Currrent
Generation
Automatic
Power
Control
(APC)
High Speed
Data Input
I
MODSET
I
BIASSET
I
PINSET
I
BIASMAX
I
MOD
I
APC
(Error Signal)
I
LD
I
MON
MPDLD
V
CC
Laser Diode Driver Circuit
+
+
+
I
BIAS
Figure 20. Typical Laser Driver Circuit Topology
Figure 21. X9530 Application Example Block Diagram
Laser
Diode
Driver
X9530
High Speed
Data Input
MOD_DEF
(0)
I
MODSET
I
LD
I
MON
MPDLD
V
CC
GBIC / SFP / XFP Module
I
PINSET
Circuit
I
1
I
2
SDA
SCK
MOD_DEF
(1)
I
BIASSET
INTERSIL
XDCP
X9530
23
FN8211.1
November 11, 2005
ABSOLUTE MAXIMUM RATINGS
All voltages are referred to Vss.
Temperature under bias .................... -65°C to +100°C
Storage temperature ......................... -65°C to +150°C
Voltage on every pin except Vcc................ -1.0V to +7V
Voltage on Vcc Pin .............................................0 to 5.5V
D.C. Output Current at pin SDA
...................... 0 to 5 mA
D.C. Output Current at pins R1, R2,
VRef and VSense.................................... -0.50 to 1 mA
D.C. Output Current at pins I1 and I2 ............... -3 to 3mA
Lead temperature (soldering, 10s) .................... 300°C
COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only; functional operation of the
device (at these or any other conditions above those
listed in the operational sections of this specification) is
not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
OPERATING CONDITIONS
Parameter Min. Max. Units
Temperature -40 +100 °C
Temperature while writing to memory 0 +70 °C
Voltage on Vcc Pin 35.5V
Voltage on any other Pin -0.3 Vcc + 0.3 V
ELECTRICAL CHARACTERISTICS
All typical values are for 25°C ambient temperature and 5 V at pin Vcc. Maximum and minimum specifications are
over the recommended operating conditions. All voltages are referred to the voltage at pin Vss unless otherwise
specified. All bits in control registers are “0” unless otherwise specified. 510, 0.1%, resistor connected between R1
and Vss, and another between R2 and Vss unless otherwise specified. 400kHz TTL input at SCL unless otherwise
specified. SDA pulled to Vcc through an external 2k resistor unless otherwise specified. 2-wire interface in “standby”
(see notes 1 and 2 on page 22), unless otherwise specified. WP
, A0, A1, and A2 floating unless otherwise specified.
VRef pin unloaded, unless otherwise specified.
Symbol Parameter Min Typ Max Unit Test Conditions / Notes
Iccstby Standby current into Vcc
pin
2 mA R1 and R2 floating, VRef unloaded.
Iccfull Full operation current into
Vcc pin
9 mA 2-wire interface reading from
memory, I
1
and I
2
both connected to
Vss, DAC input bytes: FFh, VRef
unloaded.
Iccwrite Nonvolatile Write current
into Vcc pin
4 mA Average from START condition until
t
WP
after the STOP condition
WP
: Vcc, R1 and R2 floating,
VRef unloaded.
I
PLDN
On-chip pull down
current at WP
, A0, A1,and
A2
0120AV(WP
), V(A0), V(A1), and V(A2) from
0V to Vcc
V
ILTTL
SCL and SDA, input Low
voltage
0.8 V
V
IHTTL
SCL and SDA, input High
voltage
2.0 V
I
INTTL
SCL and SDA input
current
-1 10 A Pin voltage between 0 and Vcc, and
SDA as an input.
V
OLSDA
SDA output Low voltage 0 0.4 V I(SDA) = 2 mA
I
OHSDA
SDA output High current 0 100 A V(SDA) = Vcc
V
ILCMOS
WP, A0, A1, and A2 input
Low voltage
0 0.2 x
Vcc
V
X9530
24
FN8211.1
November 11, 2005
Notes: 1. The device goes into Standby: 200 ns after any STOP, except those that initiate a nonvolatile write cycle. It goes into Standby t
WC
after
a STOP that initiates a nonvolatile write cycle. It also goes into Standby 9 clock cycles after any START that is not followed by the cor-
rect Slave Address Byte.
2. t
WC
is the time from a valid STOP condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It
is the minimum cycle time to be allowed for any nonvolatile write by the user, unless Acknowledge Polling is used.
3. For this range of V(VRef) the full scale sink mode current at I1 and I2 follows V(VRef) with a linearity error smaller than 1%.
4. These parameters are periodically sampled and not 100% tested.
5. TCO
ref
= [Max V(V
REF
) - Min V(V
REF
)] x 10
6
/(1.21V x 140°C)
V
IHCMOS
WP, A0, A1, and A2 input
High voltage
0.8 x
Vcc
Vcc V
VRefout Output Voltage at VRef at
25°C
1.205 1.21 1.215 V -20 A I(VRef) 20 A
RVref VRef pin input resistance 20 40 k VRM bit = “1”, 25°C
TCOref Temperature coefficient of
VRef output voltage
-100 +100 ppm/°
C
See note 4 and 5.
VRef Range Voltage range when VRef
is an input
1 1.3 V See note 3.
TSenseRange Temperature sensor
range
-40 100 °C See note 4.
I
R
Current from pin R1 or R2
to Vss
0 1600 A
V
POR
Power-on reset threshold
voltage
1.5 2.8 V
VccRamp Vcc Ramp Rate 0.2 50 mV /
s
V
ADCOK
ADC enable minimum
voltage
2.6 2.8 V See Figure 8.
ELECTRICAL CHARACTERISTICS (CONTINUED)
All typical values are for 25°C ambient temperature and 5 V at pin Vcc. Maximum and minimum specifications are
over the recommended operating conditions. All voltages are referred to the voltage at pin Vss unless otherwise
specified. All bits in control registers are “0” unless otherwise specified. 510, 0.1%, resistor connected between R1
and Vss, and another between R2 and Vss unless otherwise specified. 400kHz TTL input at SCL unless otherwise
specified. SDA pulled to Vcc through an external 2k resistor unless otherwise specified. 2-wire interface in “standby”
(see notes 1 and 2 on page 22), unless otherwise specified. WP
, A0, A1, and A2 floating unless otherwise specified.
VRef pin unloaded, unless otherwise specified.
Symbol Parameter Min Typ Max Unit Test Conditions / Notes
X9530

X9530V14IZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Laser Drivers TEMP COMPENSATION LASER DIODE BIAS CNT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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