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AD7865ASZ-2REEL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
REV. B
–3–
AD7865
Parameter A, Y Versions
1
B Version Unit Test Conditions/Comments
REFERENCE INPUT/OUTPUT
V
REF
IN Input Voltage Range 2.375/2.625 2.375/2.625 V
MIN
/V
MAX
2.5 V ± 5%
V
REF
IN Input Capacitance
6
10 10 pF max
V
REF
OUT Output Voltage 2.5 2.5 V nom
V
REF
OUT Error @ 25°C ± 10 ± 10 mV max
V
REF
OUT Error T
MIN
to T
MAX
± 20 ± 20 mV max
V
REF
OUT Temperature Coefficient 25 25 ppm/°C typ
V
REF
OUT Output Impedance 6 6 kΩ typ See Reference Section
LOGIC INPUTS
Input High Voltage, V
INH
2.4 2.4 V min V
DD
= 5 V ± 5%
Input Low Voltage, V
INL
0.8 0.8 V max V
DD
= 5 V ± 5%
Input Current, I
IN
± 10 ± 10 µA max
Input Capacitance, C
IN
6
10 10 pF max
LOGIC OUTPUTS
Output High Voltage, V
OH
4.0 4.0 V min I
SOURCE
= 400 µA
Output Low Voltage, V
OL
0.4 0.4 V max I
SINK
= 1.6 mA
DB13–DB0
High Impedance
Leakage Current ± 10 ± 10 µA max
Capacitance
6
10 10 pF max
Output Coding
AD7865-1, AD7865-3 Two’s Complement
AD7865-2 Straight (Natural) Binary
CONVERSION RATE
Conversion Time 2.4 2.4 µs max For Single Channel
Track/Hold Acquisition Time
2, 3
0.35 0.35 µs max
Throughput Time 350 350 kSPS max For Single Channel
100 100 kSPS max For All Four Channels
POWER REQUIREMENTS
V
DD
5 5 V nom ± 5% for Specified Performance
I
DD
AD7865-1 Typically 23 mA, Logic Inputs = 0 V or V
DD
Normal Mode 32 32 mA max
Standby Mode 20 20 µA max
AD7865-2 Typically 20 mA, Logic Inputs = 0 V or V
DD
Normal Mode 30 30 mA max
Standby Mode 20 20 µA max
AD7865-3 Typically 23 mA, Logic Inputs = 0 V or V
DD
Normal Mode 32 32 mA max
Standby Mode 20 20 µA max
Power Dissipation
AD7865-1
Normal Mode 160 160 mW max Typically 115 mW. V
DD
= 5 V
Standby Mode 100 100 µW max Typically 15 µW
AD7865-2
Normal Mode 150 150 mW max Typically 100 mW. V
DD
= 5 V
Standby Mode 100 100 µW max Typically 15 µW
AD7865-3
Normal Mode 160 160 mW max Typically 115 mW. V
DD
= 5 V
Standby Mode 100 100 µW max Typically 15 µW
NOTES
1
Temperature ranges are as follows : A, B Versions: –40°C to +85°C, Y Version: –40°C to +105°C.
2
Performance measured through full channel (SHA and ADC).
3
See Terminology.
4
Total Harmonic Distortion and Peak Harmonic or Spurious Noise are specified at –83 dBs for the AD7865-2.
5
Measured between any two channels with the other two channels grounded.
6
Sample tested @ 25°C to ensure compliance.
Specifications subject to change without notice.
REV. B
AD7865
–4–
TIMING CHARACTERISTICS
1, 2
Parameter A, B, Y Versions Unit Test Conditions/Comments
t
CONV
2.4 µs max Conversion Time, Internal Clock
3.2 µs max Conversion Time, External Clock (5 MHz)
t
ACQ
0.35 µs max Acquisition Time
t
BUSY
No. of Channels Selected Number of Channels Multiplied by t
CONV
× (t
CONV
) µs max
t
WAKE-UP
—External V
REF
3
1 µs max STBY Rising Edge to CONVST Rising Edge
t
1
35 ns min CONVST Pulsewidth
t
2
70 ns min CONVST Rising Edge to BUSY Rising Edge
Read Operation
t
3
0 ns min CS to RD Setup Time
t
4
0 ns min CS to RD Hold Time
t
5
35 ns min Read Pulsewidth
t
6
4
35 ns max Data Access Time after Falling Edge of RD, V
DRIVE
= 5 V
40 ns max Data Access Time after Falling Edge of RD, V
DRIVE
= 3 V
t
7
5
5 ns min Bus Relinquish Time after Rising Edge of RD
30 ns max
t
8
15 ns min Time Between Consecutive Reads
t
9
120 ns min EOC Pulsewidth
180 ns max
t
10
70 ns max RD Rising Edge to FRSTDATA Edge (Rising or Falling)
t
11
15 ns max EOC Falling Edge to FRSTDATA Falling Delay
t
12
0 ns min EOC to RD Delay
Write Operation
t
13
20 ns min WR Pulsewidth
t
14
0 ns min CS to WR Setup Time
t
15
0 ns min WR to CS Hold Time
t
16
5 ns min Input Data Setup Time of Rising Edge of WR
t
17
5 ns min Input Data Hold Time
External Clock
t
18
200 ns min CONVST Falling Edge to CLK Rising Edge
NOTES
1
Sample tested at 25°C to ensure compliance. All input signals are measured with tr = tf = 1 ns (10% to 90% of 5 V) and timed from a voltage level of 1.6 V.
2
See Figures 6, 7 and 8.
3
Refer to the Standby Mode Operation section. The MAX specification of 1 µs is valid when using a 0.1 µF decoupling capacitor on the V
REF
pin.
4
Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V.
5
These times are derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then
extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the times quoted in the timing characteristics are the true bus
relinquish times of the part and as such are independent of external bus loading capacitances.
Specifications subject to change without notice.
1.6mA
50pF
TO OUTPUT
PIN
1.6V
400A
Figure 1. Load Circuit for Access Time and Bus Relinquish Time
(V
DD
= 5 V 5%, AGND = DGND = 0 V, V
REF
= Internal, Clock = Internal; all specifications
T
MIN
to T
MAX
unless otherwise noted.)
REV. B
AD7865
–5–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7865 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS*
(T
A
= 25°C unless otherwise noted)
V
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V
V
DRIVE
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . V
DD
+ 0.3 V
Analog Input Voltage to AGND
AD7865-1 (± 10 V Input Range) . . . . . . . . . . . . . . . . ± 18 V
AD7865-1 (± 5 V Input Range) . . . . . . . . . . . . . . . . . . ± 9 V
AD7865-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . –1 V to +18 V
AD7865-3 . . . . . . . . . . . . . . . . . . . . . . . . . . . –4 V to +18 V
Reference Input Voltage to AGND . . . –0.3 V to V
DD
+ 0.3 V
Digital Input Voltage to DGND . . . . . –0.3 V to V
DD
+ 0.3 V
Digital Output Voltage to DGND . . . . –0.3 V to V
DD
+ 0.3 V
Operating Temperature Range
Commercial (A, B Versions) . . . . . . . . . . . –40°C to +85°C
Automotive (Y Version) . . . . . . . . . . . . . . –40°C to +105°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
PQFP Package, Power Dissipation . . . . . . . . . . . . . . 450 mW
θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 95°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . 215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Input Relative Temperature Package Package
Model Ranges Accuracy Ranges Description Option
AD7865AS-1 ± 5 V, ±10 V ± 2 LSB –40°C to +85°C Plastic Lead Quad Flatpack S-44
AD7865BS-1 ± 5 V, ±10 V ± 1.5 LSB –40°C to +85°C Plastic Lead Quad Flatpack S-44
AD7865YS-1 ± 5 V, ±10 V ± 2 LSB –40°C to +105°C Plastic Lead Quad Flatpack S-44
AD7865AS-2 0 V to 2.5 V, 0 V to 5 V ± 2 LSB –40°C to +85°C Plastic Lead Quad Flatpack S-44
AD7865BS-2 0 V to 2.5 V, 0 V to 5 V ± 1.5 LSB –40°C to +85°C Plastic Lead Quad Flatpack S-44
AD7865YS-2 0 V to 2.5 V, 0 V to 5 V ± 2 LSB –40°C to +105°C Plastic Lead Quad Flatpack S-44
AD7865AS-3 ± 2.5 V ± 2 LSB –40°C to +85°C Plastic Lead Quad Flatpack S-44
AD7865BS-3 ± 2.5 V ± 1.5 LSB –40°C to +85°C Plastic Lead Quad Flatpack S-44
AD7865YS-3 ± 2.5 V ± 2 LSB –40°C to +105°C Plastic Lead Quad Flatpack S-44
PIN CONFIGURATION
12 13 14 15 16 17 18 19
20
21 22
3
4
5
6
7
1
2
10
11
8
9
40 39 3841
42
4344 36 35 3437
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
29
30
31
32
27
28
25
26
23
24
33
DB7
DB8
DB0
DB1
DB2
DB3
DB4
DB5
DGND
V
DRIVE
DV
DD
DB6
EOC
DB9
DB10
DB12
DB13
AGND
AGND
AGND
V
I
N4B
V
IN4A
V
IN3B
V
IN3A
V
IN2B
BUSY
FRSTDATA
CONVST
CS
RD
WR
CLK IN/SL1
INT/EXT CLK/SL2
SL3
SL4
H/S SEL
AV
DD
V
REF
AGND
V
I
N2A
V
IN1B
V
I
N1A
STBY
AD7865
DB11
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

AD7865ASZ-2REEL

Mfr. #:
Buy AD7865ASZ-2REEL
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC Fast Lo-Pwr 4-Ch Simult Sampling 14B
Lifecycle:
New from this manufacturer.
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