MC13203FCR2 Datasheet MC13203FC, MC13203FCR2 | P19-P21

MC13202/203 Technical Data, Rev. 1.1

Freescale Semiconductor 19

8 Crystal Oscillator Reference Frequency

This section provides application specific information regarding crystal oscillator reference design and

recommended crystal usage.

8.1 Crystal Oscillator Design Considerations

The 802.15.4 Standard requires that several frequency tolerances be kept within ± 40 ppm accuracy. This

means that a total offset up to 80 ppm between transmitter and receiver will still result in acceptable

performance. The MC132202/203MC132202/203 transceiver provides onboard crystal trim capacitors to

assist in meeting this performance.

The primary determining factor in meeting this specification is the tolerance of the crystal oscillator

reference frequency. A number of factors can contribute to this tolerance and a crystal specification will

quantify each of them:

1. The initial (or make) tolerance of the crystal resonant frequency itself.

2. The variation of the crystal resonant frequency with temperature.

3. The variation of the crystal resonant frequency with time, also commonly known as aging.

4. The variation of the crystal resonant frequency with load capacitance, also commonly known as

pulling. This is affected by:

a) The external load capacitor values - initial tolerance and variation with temperature.

b) The internal trim capacitor values - initial tolerance and variation with temperature.

c) Stray capacitance on the crystal pin nodes - including stray on-chip capacitance, stray package

capacitance and stray board capacitance; and its initial tolerance and variation with

temperature.

5. Whether or not a frequency trim step will be performed in production

Freescale requires the use of a 16 MHz crystal with a <9 pF load capacitance. The MC13202/203 does not

contain a reference divider, so 16 MHz is the only frequency that can be used. A crystal requiring higher

load capacitance is prohibited because a higher load on the amplifier circuit may compromise its

performance. The crystal manufacturer defines the load capacitance as that total external capacitance seen

across the two terminals of the crystal. The oscillator amplifier configuration used in the MC13202/203

requires two balanced load capacitors from each terminal of the crystal to ground. As such, the capacitors

are seen to be in series by the crystal, so each must be <18 pF for proper loading.

In the Figure 11 crystal reference schematic, the external load capacitors are shown as 6.8 pF each, used

in conjunction with a crystal that requires an 8 pF load capacitance. The default internal trim capacitor

value (2.4 pF) and stray capacitance total value (6.8 pF) sum up to 9.2 pF giving a total of 16 pF. The value

for the stray capacitance was determined empirically assuming the default internal trim capacitor value and

for a specific board layout. A different board layout may require a different external load capacitor value.

The on-chip trim capability may be used to determine the closest standard value by adjusting the trim value

via the SPI and observing the frequency at CLKO. Each internal trim load capacitor has a trim range of

approximately 5 pF in 20 fF steps.

MC13202/203 Technical Data, Rev. 1.1

20 Freescale Semiconductor

Figure 11. MC13202/203 Modem Crystal Circuit

Initial tolerance for the internal trim capacitance is approximately ±15%.

Since the MC13202/203 contains an on-chip reference frequency trim capability, it is possible to trim out

virtually all of the initial tolerance factors and put the frequency within 0.12 ppm on a board-by-board

basis. Individual trimming of each board in a production environment allows use of the lowest cost crystal,

but requires that each board go through a trimming procedure. This step can be avoided by

using/specifying a crystal with a tighter stability tolerance, but the crystal will be slightly higher in cost.

A tolerance analysis budget may be created using all the previously stated factors. It is an engineering

judgment whether the worst case tolerance will assume that all factors will vary in the same direction or if

the various factors can be statistically rationalized using RSS (Root-Sum-Square) analysis. The aging

factor is usually specified in ppm/year and the product designer can determine how many years are to be

assumed for the product lifetime. Taking all of the factors into account, the product designer can determine

the needed specifications for the crystal and external load capacitors to meet the 802.15.4 Standard.

8.2 Crystal Requirements

The suggested crystal specification for the MC13202/203 is shown in Table 9. A number of the stated

parameters are related to desired package, desired temperature range and use of crystal capacitive load

trimming. For more design details and suggested crystals, see application note AN3251, Reference

Oscillator Crystal Requirements for MC1319x, MC1320x, and MC1321x.

Table 9. MC13202/203 Crystal Specifications

User must be sure manufacturer specifications apply to the desired package.

Parameter Value Unit Condition

Frequency 16.000000 MHz

Frequency tolerance (cut tolerance)

A wider frequency tolerance may acceptable if application uses trimming at production final test.

± 10 ppm at 25 °C

Frequency stability (temperature drift)

± 15 ppm Over desired temperature range

Aging

± 2 ppm max

Equivalent series resistance

43 Ω max

Load capacitance

5 - 9 pF

Shunt capacitance <2 pF max

Mode of oscillation fundamental

16MHz

C10

6.8pF

C11

6.8pF

Y1 = Daishinku KDS - DSX321G ZD00882

XTA L1

XTA L2

MC1320x

MC13202/203 Technical Data, Rev. 1.1

Freescale Semiconductor 21

8.3 Low Power Considerations

• Program and use the modem IO pins properly for low power operation

— All unused modem GPIOx signals must be used one of 2 ways:

– If the Off mode is to be used as a long term low power mode, unused GPIO should be tied

to ground. The default GPIO mode is an input and there will be no conflict.

– If only Hibernate and/or Doze modes are used as long term low power modes, the GPIO

should programmed as outputs in the low state.

— When modem GPIO are used as outputs:

– Pullup resistors should be provided (can be provided by the MCU IO pin if tied to the MCU)

if the modem Off condition is to be used as a long term low power mode.

– During Hibernate and/or Doze modes, the GPIO will retain its programmed output state.

— If the modem GPIO is used as an input, the GPIO should be driven by its source during all low

power modes or a pullup resistor should be provided.

— Digital outputs IRQ

, MISO, and CLKO:

– MISO - is always an output. During Hibernate, Doze, and active modes, the default

condition is for the MISO output to go to tristate when CE

is de-asserted, and this can cause

a problem with the MCU because one of its inputs can float. Program Control_B Register

07, Bit 11, miso_hiz_en = 0 so that MISO is driven low when CE

is de-asserted. As a result,

MISO will not float when Doze or Hibernate Mode is enabled.

–IRQ

- is an open drain output (OD) and should always have a pullup resistor (typically

provided by the MCU IO). IRQ

acts as the interrupt request output.

NOTE

It is good practice to have the IRQ

interrupt input to the MCU disabled

during the hardware reset to the modem. After releasing the modem

hardware reset, the interrupt request input to the MCU can then be enabled

to await the IRQ

that signifies the modem is ready and in Idle mode; this can

prevent a possible extraneous false interrupt request.

– CLKO - is always an output. During Hibernate CLKO retains its output state, but does not

toggle. During Doze, CLKO may toggle depending on whether it is being used.

• If the MCU is also going to be used in low power modes, be sure that all unused IO are programmed

properly for low power operation (typically best case is as outputs in the low state). The

MC13202/203 is commonly used with the Freescale MC9S08GT/GB 8-bit devices. For these

MCUs:

— Use only STOP2 and STOP3 modes (not STOP1) with these devices where the GPIO states are

retained. The MCU must retain control of the MC13202/203 IO during low power operation.

A wider frequency stability may be acceptable if application uses trimming at production final test.

A wider aging tolerance may be acceptable if application uses trimming at production final test.

Higher ESR may be acceptable with lower load capacitance.

Lower load capacitance can allow higher ESR and is better for low temperature operation in Doze mode.

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MC13203FCR2

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IC RF TXRX 802.15.4 32VFQFN

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MC13203FCR2

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