25©2017 Integrated Device Technology, Inc December 18, 2017
5X2503 Datasheet
SMBus Table Byte 30: OE and DFC Control
SMBus Table Byte 31: Control Register
SMBus Table Byte 32: Control Register
Byte 1Eh Name Control Function Type 0 1 PWD
Bit 7 OUT1_EN OUT1 output enable control R/W disable enable 1
Bit 6 OE1_fun_sel[1] OE1 pin function selection bit 1 R/W
11:DFC0 10: OUT1_PPS
01: PD# 00: OUT1 OE
0
Bit 5 OE1_fun_sel[0] OE1 pin function selection bit 0 R/W 0
Bit 4 OUT3_EN OUT3 output enable control R/W disable enable 1
Bit 3 Reserved R/W — — 0
Bit 2 Reserved R/W — — 0
Bit 1 DFC_SW_Sel[1] DFC frequency select bit 1 R/W
00: N0 01: N1 10:N2 11:N3
0
Bit 0 DFC_SW_Sel[0] DFC frequency select bit 0 R/W 0
Byte 1Fh Name Control Function Type 0 1 PWD
Bit 7 OUT2 free run_b OUT2 free run_b R/W freerun stoppable 1
Bit 6
Reserved R/W — — 0
Bit 5
Reserved R/W — — 0
Bit 4 Reserved R/W — — 0
Bit 3 Reserved R/W — — 0
Bit 2 PLL2_3rd_EN_CFG PLL2 3rd order control R/W 1st order 3rd order 1
Bit 1 OUTDIV5 source OUTDIV5 source R/W PLL3 DIV4seed 0
Bit 0 PLL2_EN_3rdpole PLL2 3rd Pole control R/W disable enable 0
Byte 20h Name Control Function Type 0 1 PWD
Bit 7 OUT2_EN OUT2 output enable control R/W disable enable 1
Bit 6
Reserved R/W — — 0
Bit 5 Reserved R/W — — 0
Bit 4 DFC_EN DFC function control R/W disable enable 0
Bit 3
Reserved R/W — — 0
Bit 2 Reserved R/W — — 0
Bit 1
Reserved R/W — — 0
Bit 0 Reserved R/W — — 0
