7©2017 Integrated Device Technology, Inc December 18, 2017
5X2503 Datasheet
Table 6. Output Divider 2, 3, and 5
Table 7. Output Divider 4
Output Clock Test Conditions
Figure 5. LVCMOS Output Clock Test Condition
Output Divider Bits [1:0]
Output Divider Bits [3:2]
00 01 10 11
00 1245
01 3 6 12 15
10 5 102025
11 10 20 40 50
Output Divider Bits [1:0]
Output Divider Bits [3:2]
00 01 10 11
00 1248
01 3 6 12 24
10 5 102040
11 10 20 40 80
V
DDO
R
OUT
Rs
1.2V 30 20
1.8V 17 33
2 inches
2pF
Rs
LVCMOS
50 ohm
8©2017 Integrated Device Technology, Inc December 18, 2017
5X2503 Datasheet
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the 5X2503. These ratings, which are standard values for IDT
commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect
product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Table 8. Absolute Maximum Ratings
Recommended Operating Conditions
Item Rating
Supply Voltage, V
DD1_8
, V
DDOUTx
1.89V
Inputs
Other Inputs -0.5V to V
DD1_8
/ V
DDOUTx
Outputs, V
DDOUTx
(LVCMOS) -0.5V to V
DDOUTx
+ 0.5V
Outputs, IO (SDA) 10mA
Package Thermal Impedance, Θ
JA
42°C/W (0mps)
Package Thermal Impedance, Θ
JC
41.8°C/W (0mps)
Storage Temperature, T
STG
-65°C to 150°C
ESD Human Body Model 2000V
Junction Temperature 125°C
Table 9. Recommended Operating Conditions
Symbol Parameter Minimum Typical Maximum Units
V
DDOUT1
Power Supply Voltage for Supporting OUT1 1.71 1.8 1.89 V
V
DDOUT1
Power Supply Voltage for Supporting OUT1 1.14 1.2 1.26 V
V
DDOUT2
Power Supply Voltage for Supporting OUT2/OUT3 1.71 1.8 1.89 V
V
DD1_8
Power Supply Voltage for Core Logic Functions 1.71 1.8 1.89 V
T
A
Ambient Operating Temperature -40 85 °C
C
LOAD_OUT
Maximum Load Capacitance (1.8V LVCMOS only) 5 pF
t
PU
Power-up Time for all V
DD
s to reach Minimum Specified Voltage
(power ramps must be monotonic)
0.05 3 ms
9©2017 Integrated Device Technology, Inc December 18, 2017
5X2503 Datasheet
Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down
Resistance
(T
A
= +25 °C)
Integrated Crystal Characteristics
1
Frequency deviation–refer to center frequency.
DC Electrical Characteristics
1
Single CMOS driver active.
2
OUT1–3 current measured with 0.5 inches transmission line and no load.
Table 10. Input Capacitance, LVCMOS Output Impedance, and Internal Pull-down Resistance
Symbol Parameter Minimum Typical Maximum Units
C
IN
Input Capacitance (OE, SDA, SCL) 3 7 pF
Pull-down Resistor OE 150 k
R
OUT
LVCMOS Output Driver Impedance (V
DDOUTx
= 1.8V) 17
Table 11. Crystal Characteristics
Parameter Test Conditions Minimum Typical Maximum Units
Mode of Oscillation Fundamental
Frequency 26 MHz
Frequency Tolerance (25°C)
1
—-2020ppm
Equivalent Series Resistance (ESR) 10 100
Shunt Capacitance 2 7 pF
Load Capacitance (C
L
) 6 8 10 pF
Maximum Crystal Drive Level 100 μW
Table 12. DC Electrical Characteristics
1,2
Symbol Parameter Conditions Minimum Typical Maximum Units
I
DD
Operation Supply Current
V
DD
= V
DDOUTx
= V
DD1_8
= 1.8V; OUT1 = 12MHz,
OUT3 = 26MHz, OUT2 off, no load.
—2.0mA
V
DD
= V
DDOUTx
= V
DD1_8
= 1.8V; OUT1 = 12MHz,
OUT3 = 26MHz, OUT2 off, with load.
—3.5mA
V
DD
= V
DDOUTx
= V
DD1_8
= 1.8V; OUT1 = 26MHz,
OUT3 = 26MHz, OUT2 = 32kHz, no load.
—1.8mA
V
DD
= V
DDOUTx
= V
DD1_8
= 1.8V; OUT1 = 26MHz,
OUT3 = 26MHz, OUT2 = 32kHz, with load.
—3.8mA
I
DDPD
Power Down Current
PD asserted with V
DD1_
8 and V
DDOUTx
on, I
2
C
programming, 32kHz running.
—390μA
I
DDSUSPEND
Power Suspend Current
V
DDOUT2
off and only V
DDOUT1
and V
DD1_8
on,
I
2
C programming, 32kHz running.
—1.62.0μA

5X2503-000NDGI

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products Microclock Programmable Clock Generator
Lifecycle:
New from this manufacturer.
Delivery:
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Payment:
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