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DS2761BE+025

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DS2761
7 of 24
charge FET back on (unless another protection condition prevents it). Discharging remains enabled
during overvoltage, and the DS2761 re-enables the charge FET before V
IN
< V
CE
if a discharge current of
-80mA (V
IS
≤ -2mV) or less is detected.
Undervoltage. If the voltage of the cell drops below undervoltage threshold V
UV
for a period longer than
undervoltage delay t
UVD
, the DS2761 shuts off the charge and discharge FETs, sets the UV flag in the
protection register, and enters sleep mode. The DS2761 provides a current-limited recovery charge path
from PLS to V
DD
to gently charge severely depleted cells during sleep mode.
Overcurrent, Charge Direction. The voltage difference between the IS1 pin and the IS2 pin (V
IS
= V
IS1
-
V
IS2
) is the filtered voltage drop across the current-sense resistor. If V
IS
exceeds overcurrent threshold
V
OC
for a period longer than overcurrent delay t
OCD
, the DS2761 shuts off both external FETs and sets the
COC flag in the protection register. The charge current path is not re-established until the voltage on the
PLS pin drops below V
DD
- V
TP
. The DS2761 provides a test current of value I
TST
from PLS to V
SS
to pull
PLS down in order to detect the removal of the offending charge current source.
Overcurrent, Discharge Direction. If V
IS
is less than -V
OC
for a period longer than t
OCD
, the DS2761
shuts off the external discharge FET and sets the DOC flag in the protection register. The discharge
current path is not re-established until the voltage on PLS rises above V
DD
- V
TP
. The DS2761 provides a
test current of value I
TST
from V
DD
to PLS to pull PLS up in order to detect the removal of the offending
low-impedance load.
Short Circuit. If the voltage on the SNS pin with respect to V
SS
exceeds short-circuit threshold V
SC
for a
period longer than short-circuit delay t
SCD
, the DS2761 shuts off the external discharge FET and sets the
DOC flag in the protection register. The discharge current path is not re-established until the voltage on
PLS rises above V
DD
- V
TP
. The DS2761 provides a test current of value I
TST
from V
DD
to PLS to pull
PLS up in order to detect the removal of the short circuit.
Figure 3. Li+ PROTECTION CIRCUITRY EXAMPLE WAVEFORMS
(1) To allow the device to react quickly to short circuits, detection occurs on the SNS pin rather than on the
filtered IS1 and IS2 pins. The actual short-circuit detect condition is V
SNS
> V
SC
.
SLEEP
MODE
V
OV
V
CE
V
UV
V
CELL
V
IS
CHARGE
DISCHARGE
CC
DC
-V
SC
V
OC
-V
OC
0
t
SC
D
t
OC
D
t
OCD
t
U
VD
t
OVD
V
PLS
V
DD
ACTIVE
V
SS
V
SS
INACTIVE
t
OVD
(1)
DS2761
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Summary. All of the protection conditions described above are OR'ed together to affect the
CC
and
DC
outputs.
DC
= (Undervoltage) or (Overcurrent, Either Direction) or (Short Circuit) or
(Protection Register Bit DE = 0) or (Sleep Mode)
CC
= (Overvoltage) or (Undervoltage) or (Overcurrent, Charge Direction) or (Protection Register
bit CE = 0) or (Sleep Mode)
CURRENT MEASUREMENT
In the active mode of operation, the DS2761 continually measures the current flow into and out of the
battery by measuring the voltage drop across a current-sense resistor. The DS2761 is available in two
configurations: 1) internal 25mW current-sense resistor, and 2) external user-selectable sense resistor. In
either configuration, the DS2761 considers the voltage difference between pins IS1 and IS2 (V
IS
= V
IS1
-
V
IS2
) to be the filtered voltage drop across the sense resistor. A positive V
IS
value indicates current is
flowing into the battery (charging), while a negative V
IS
value indicates current is flowing out of the
battery (discharging).
V
IS
is measured with a signed resolution of 12-bits. The current register is updated in two’s-complement
format every 88ms (128/fsample) with an average of 128 readings. Currents outside the range of the
register are reported at the limit of the range. The format of the current register is shown in Figure 4.
For the internal sense resistor configuration, the DS2761 maintains the current register in units of amps,
with a resolution of 0.625mA and full-scale range of no less than ±1.9A (see Note 7 on I
FS
spec for more
details). The DS2761 automatically compensates for internal sense resistor process variations and
temperature effects when reporting current.
For the external sense resistor configuration, the DS2761 writes the measured V
IS
voltage to the current
register, with a resolution of 15.625mV and a full-scale range of ±64mV.
Figure 4. CURRENT REGISTER FORMAT
MSB—Address 0E LSB—Address 0F
S 2
11
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
X X X
MSb LSb MSb LSb
Units: 0.625mA for Internal Sense Resisto
r
15.625mV for External Sense Resisto
r
CURRENT ACCUMULATOR
The current accumulator facilitates remaining capacity estimation by tracking the net current flow into
and out of the battery. Current flow into the battery increments the current accumulator while current
flow out of the battery decrements it. Data is maintained in the current accumulator in two’s-complement
format. The format of the current accumulator is shown in Figure 5.
DS2761
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When the internal sense resistor is used, the DS2761 maintains the current accumulator in units of amp-
hours, with a resolution of 0.25mAhrs and full-scale range of ±8.2Ahrs. When using an external sense
resistor, the DS2761 maintains the current accumulator in units of volt-hours, with a resolution of
6.25mVhrs and a full scale range of ±205mVhrs.
The current accumulator is a read/write register that can be altered by the host system as needed.
Figure 5. CURRENT ACCUMULATOR FORMAT
MSB—Address 10 LSB—Address 11
S 2
14
2
13
2
12
2
11
2
10
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
2
0
MSb LSb MSb LSb
Units: 0.25mAhrs for Internal Sense Resisto
r
6.25mVhrs for External Sense Resisto
r
CURRENT OFFSET COMPENSATION
Current measurement and current accumulation are both internally compensated for offset on a continual
basis minimizing error resulting from variations in device temperature and voltage. Additionally, a
constant bias can be utilized to alter any other sources of offset. This bias resides in EEPROM address
33h in two’s-complement format and is subtracted from each current measurement. The current offset
bias is applied to both the internal and external sense resistor configurations. The factory default for the
current offset bias is a value of 0.
Figure 6. CURRENT OFFSET BIAS
Address 33
S 2
6
2
5
2
4
2
3
2
2
2
1
2
0
MSb LSb
Units: 0.625mA for Internal Sense Resisto
r
15.625mV for External Sense Resisto
r
VOLTAGE MEASUREMENT
The DS2761 continually measures the voltage between pins V
IN
and V
SS
over a range of 0 to 4.75V. The
voltage register is updated in two’s-complement format every 3.4ms with a resolution of 4.88mV.
Voltages above the maximum register value are reported as the maximum value. The voltage register
format is shown in Figure 7.
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DS2761BE+025

Mfr. #:
Buy DS2761BE+025
Manufacturer:
Maxim Integrated
Description:
Battery Management
Lifecycle:
New from this manufacturer.
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