1. General description
The 74HC7403; 74HCT7403 is an expandable, First-In First-Out (FIFO) memory
organized as 64 words by 4 bits. A guaranteed 15 MHz data-rate makes it ideal for
high-speed applications. A higher data-rate can be obtained in applications where the
status flags are not used (burst-mode). With separate controls for shift-in (SI) and shift-out
(SO
), reading and writing operations are completely independent, allowing synchronous
and asynchronous data transfers. Additional controls include a master-reset input (MR
),
an output enable input (OE
) and flags. The data-in-ready (DIR) and data-out-ready (DOR)
flags indicate the status of the device. Inputs include clamp diodes that enable the use of
current limiting resistors to interface inputs to voltages in excess of V
CC
.
2. Features and benefits
Synchronous or asynchronous operation
30 MHz (typical) shift-in and shift-out rates
Readily expandable in word and bit dimensions
Pinning arranged for easy board layout: input pins directly opposite output pins
Input levels:
For 74HC7403: CMOS level
For 74HCT7403: TTL level
3-state outputs
Complies with JEDEC standard JESD7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 Cto+85C and from 40 Cto+125C
3. Applications
High-speed disc or tape controller
Communications buffer
74HC7403; 74HCT7403
4-bit x 64-word FIFO register; 3-state
Rev. 4 — 24 September 2012 Product data sheet
