ICS1894-34
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH MII INTERFACE PHYCEIVER
IDT®
10BASE-T/100BASE-TX INTEGRATED PHYCEIVER WITH MII INTERFACE 10
ICS1894-34 REV B 052112
Receive Error (RXER)
RXER is asserted for one or more RXCLK periods to
indicate that an error (e.g. a coding error or any error that a
PHY is capable of detecting, and that may otherwise be
undetectable by the MAC sub-layer) was detected
somewhere in the frame presently being transferred from
the PHY. RXER transitions synchronously with respect to
RXC. While RXDV is de-asserted, RXER has no effect on
the MAC.
Carrier Sense (CRS)
CRS is asserted and de-asserted as follows:
• In 10Mbps mode, CRS assertion is based on the
reception of valid preambles. CRS de-assertion is based
on the reception of an end-of-frame (EOF) marker.
• In 100Mbps mode, CRS is asserted when a
start-of-stream delimiter, or /J/K symbol pair is detected.
CRS is deasserted when an end-of-stream delimiter, or
/T/R symbol pair is detected. Additionally, the PMA layer
de-asserts CRS if IDLE symbols are received without
/T/R.
Collision (COL)
COL is asserted in half-duplex mode whenever the
transmitter and receiver are simultaneously active on the
line. This is used to inform the MAC that a collision has
occurred during its transmission to the PHY.
COL transitions asynchronously with respect to TXCLK and
RXCLK.
Auto-MDI/MDIX Crossover
The ICS1894-34 includes the auto-MDI/MDIX crossover
feature. In a typical CAT 5 Ethernet installation the transmit
twisted pair signal pins of the RJ45 connector are crossed
over in the CAT 5 wiring to the partners receive twisted pair
signal pins and receive twisted pair to the partners transmit
twisted pair. This is usually accomplished in the wiring plant.
Hubs generally wire the RJ45 connector crossed to
accomplish the crossover. Two types of CAT 5 cables
(straight and crossed) are available to achieve the correct
connection. The Auto-MDI/MDIX feature automatically
corrects for miss-wired installations by automatically
swapping transmit and receive signal pairs at the PHY when
no link results. Auto-MDI/MDIX is automatic, but may be
disabled for test purposes by writing MDIO register 19 Bits
9:8 in the MDIO register. The Auto-MDI/MDIX function is
independent of Auto-Negotiation and preceeds
Auto-Negotiation when enabled.
Auto MDI/MDIX Table
Definitions:
straight transmit = TP_AP & TP_AN
receive = TP_BP & TP_BN
cross transmit = TP_BP & TP_BN
receive = TP_AP & TP_AN
AMDIX_EN (Pin 14) AMDIX enable pin with 20 kOhm
pull-up resistor
AMDIX_EN [19:9] MDIO register 19h bit 9
MDI_MODE [19:8] MDIO register 19h bit 8
AMDIX_EN
(pin 14)
AMDIX_EN
[Reg 19:9]
MDI_MODE
[Reg 19:8]
Tx/Rx MDI
Configuration
x00 straight
x01 cross
01x straight
1 1 x straight/cross (auto
select)
Default
1 1 0 straight/cross (auto
select)
