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SST39VF3201C-70-4I-B3KE

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P37
©2014 Silicon Storage Technology, Inc. DS20005020B 07/14
16
32 Mbit Multi-Purpose Flash Plus
SST39VF3201C / SST39VF3202C
Data Sheet
Table 9: System Interface Information for SST39VF3201C/3202C
Address Data Data
1BH 0027H V
DD
Min (Program/Erase)
DQ
7
-DQ
4
: Volts, DQ
3
-DQ
0
: 100 millivolts
1CH 0036H V
DD
Max (Program/Erase)
DQ
7
-DQ
4
: Volts, DQ
3
-DQ
0
: 100 millivolts
1DH 0000H V
PP
min. (00H = no V
PP
pin)
1EH 0000H V
PP
max. (00H = no V
PP
pin)
1FH 0003H Typical time out for Word-Program 2
N
µs (2
3
= 8 µs)
20H 0000H Typical time out for min. size buffer program 2
N
µs (00H = not supported)
21H 0004H Typical time out for individual Sector/Block-Erase 2
N
ms (2
4
=16ms)
22H 0005H Typical time out for Chip-Erase 2
N
ms (2
5
=32ms)
23H 0001H Maximum time out for Word-Program 2
N
times typical (2
1
x2
3
=16µs)
24H 0000H Maximum time out for buffer program 2
N
times typical
25H 0001H Maximum time out for individual Sector/Block-Erase 2
N
times typical (2
1
x2
4
=32ms)
26H 0001H Maximum time out for Chip-Erase 2
N
times typical (2
1
x2
5
=64ms)
T9.0 20005020
Table 10: Device Geometry Information for SST39VF3201C/3202C
Address Data Data
27H 0016H Device size = 2
N
Bytes (16H = 22; 2
22
= 4MByte)
28H 0001H Flash Device Interface description; 0001H = x16-only asynchronous interface
29H 0000H
2AH 0000H Maximum number of bytes in multi-byte write = 2
N
(00H = not supported)
2BH 0000H
2CH 0003H Number of Erase Sector/Block sizes supported by device
2DH 0007H Erase Block1 region information.
2EH 0000H
2FH 0020H
30H 0000H
31H 003EH Erase Block2 region information.
32H 0000H
33H 0000H
34H 0001H
35H 0000H Erase Block3 region information.
36H 0000H
37H 0000H
38H 0000H
39H 0000H Erase Block4 region information.
3AH 0000H
3BH 0000H
3CH 0000H
T10.0 20005020
©2014 Silicon Storage Technology, Inc. DS20005020B 07/14
17
32 Mbit Multi-Purpose Flash Plus
SST39VF3201C / SST39VF3202C
Data Sheet
Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute
Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these conditions or conditions greater than those defined in the
operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating con-
ditions may affect device reliability.)
Temperature Under Bias .............................................. -55°C to +125°C
Storage Temperature ................................................ -65°C to +150°C
D. C. Voltage on Any Pin to Ground Potential .............................-0.5V to V
DD
+0.5V
Transient Voltage (<20 ns) on Any Pin to Ground Potential ..................-2.0V to V
DD
+2.0V
Voltage on A
9
Pin to Ground Potential .....................................-0.5V to 13.2V
Package Power Dissipation Capability (T
A
= 25°C) ................................... 1.0W
Surface Mount Solder Reflow Temperature ............................ 260°C for 10 seconds
Output Short Circuit Current
1
.................................................. 50mA
1. Outputs shorted for no more than one second. No more than one output shorted at a time.
Table 11: Operating Range
Range Ambient Temp V
DD
Commercial 0°C to +70°C 2.7-3.6V
Industrial -40°C to +85°C 2.7-3.6V
T11.1 20005020
Table 12: AC Conditions of Test
1
1. See Figures 19 and 20
Input Rise/Fall Time Output Load
5ns C
L
=30pF
T12.1 20005020
©2014 Silicon Storage Technology, Inc. DS20005020B 07/14
18
32 Mbit Multi-Purpose Flash Plus
SST39VF3201C / SST39VF3202C
Data Sheet
Power Up Specifications
All functionalities and DC specifications are specified for a V
DD
ramp rate of greater than 1V per 100
ms (0V to 3V in less than 300 ms). If the VDD ramp rate is slower than 1V per 100 ms, a hardware
reset is required. The recommended V
DD
power-up to RESET# high time should be greater than 100
µs to ensure a proper reset.
Figure 4: Power-Up Diagram
Table 13: DC Operating Characteristics V
DD
= 2.7-3.6V
1
1. Typical conditions for the Active Current shown on the front page of the data sheet are average values at 25°C
(room temperature), and V
DD
= 3V. Not 100% tested.
Symbol Parameter
Limits
Test ConditionsMin Max Units
I
DD
Power Supply Current Address input=V
ILT
/V
IHT
2
, at f=5 MHz,
V
DD
=V
DD
Max
2. See Figure 19
Read
3
3. The I
DD
current listed is typically less than 2mA/MHz, with OE# at V
IH.
Typical V
DD
is 3V.
15 mA CE#=V
IL
, OE#=WE#=V
IH
, all I/Os open
Program and Erase 45 mA CE#=WE#=V
IL
, OE#=V
IH
I
SB
Standby V
DD
Current 50 µA CE#=V
IHC
,V
DD
=V
DD
Max
I
ALP
Auto Low Power 50 µA CE#=V
ILC
,V
DD
=V
DD
Max
All inputs=V
SS
or V
DD,
WE#=V
IHC
I
LI
Input Leakage Current 1 µA V
IN
=GND to V
DD
,V
DD
=V
DD
Max
I
LIW
Input Leakage Current
on WP# pin and RST#
10 µA WP#=GND to V
DD
or RST#=GND to V
DD
I
LO
Output Leakage Current 1 µA V
OUT
=GND to V
DD
,V
DD
=V
DD
Max
V
IL
Input Low Voltage 0.8 V V
DD
=V
DD
Min
V
ILC
Input Low Voltage (CMOS) 0.3 V V
DD
=V
DD
Max
V
IH
Input High Voltage 0.7V
DD
VV
DD
=V
DD
Max
V
IHC
Input High Voltage (CMOS) V
DD
-0.3 V V
DD
=V
DD
Max
V
OL
Output Low Voltage 0.2 V I
OL
=100 µA, V
DD
=V
DD
Min
V
OH
Output High Voltage V
DD
-0.2 V I
OH
=-100 µA, V
DD
=V
DD
Min
T13.0 20005020
1410 F24.0
V
DD
RESET#
CE#
T
PU-READ
10 0 µs
V
DD
min
0V
V
IH
T
RHR
50 ns
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P37

SST39VF3201C-70-4I-B3KE

Mfr. #:
Buy SST39VF3201C-70-4I-B3KE
Manufacturer:
Microchip Technology
Description:
NOR Flash 2.7V to 3.6V 32Mbit Multi-Prps Fl
Lifecycle:
New from this manufacturer.
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