1
®
ISL98001
Triple Video Digitizer with Digital PLL
The ISL98001 3-Channel, 8-bit Analog Front-End (AFE)
contains all the functions necessary to digitize analog YPbPr
video signals and RGB graphics signals from DVD players,
digital VCRs, video set-top boxes, and personal computers.
This product family’s conversion rates support HDTV
resolutions up to 1080p and PC monitor resolutions up to
UXGA and QXGA, while the front end's programmable input
bandwidth ensures sharp, clear images at all resolutions.
To maximize performance with the widest variety of video
sources, the ISL98001 features a fast-responding digital PLL
(DPLL), providing extremely low jitter with PC graphics signals
and quick recovery from VCR head switching with video
signals. Integrated HSYNC and SOG processing eliminate the
need for external slicers, sync separators, Schmitt triggers,
and filters.
Glitchless, automatic Macrovision™-compliance is obtained
by a digital Macrovision detection function that detects and
automatically removes Macrovision from the HSYNC signal.
Ease-of-use is also emphasized with features such as the
elimination of PLL charge pump current/VCO range
programming and single-bit switching between RGB and
YPbPr signals. Automatic Black Level Compensation (ABLC)
eliminates part-to-part offset variation, ensuring perfect black
level performance in every application.
The ISL98001 is fully backwards compatible (hardware and
software) with the X980xx family of AFEs.
Features
140MSPS, 170MSPS, 210MSPS, and 275MSPS
maximum conversion rates
Glitchless Macrovision-compliant sync separator
Extremely fast recovery from VCR head switching
Low PLL clock jitter (250ps
P-P
@ 170MSPS)
64 intrapixel sampling positions
0.35V
P-P
to 1.4V
P-P
video input range
Programmable bandwidth (100MHz to 780MHz)
2-channel input multiplexer
RGB 4:4:4 and YUV 4:2:2 output formats
5 embedded voltage regulators allow operation from
single 3.3V supply and enhance performance, isolation
Completely independent 8-bit gain/10-bit offset control
Pb-free (RoHS compliant)
Applications
Digital TVs
•Projectors
Multifunction monitors
Digital KVM
RGB graphics processing
Simplified Block Diagram
RGB/YPbPr
IN
1
PGA
8-BIT ADC
+
OFFSET
DAC
ABLC™
8 OR 16
x3
SOG
IN
1/2
HSYNC
IN
1/2
VSYNC
IN
1/2
SYNC
PROCESSING
DIGITAL PLL
VOLTAGE
CLAMP
RGB/YPbPr
IN
2
3
3
RGB/YUV
OUT
PIXELCLK
OUT
HS
OUT
HSYNC
OUT
AFE CONFIGURATION AND CONTROL
VSYNC
OUT
Data Sheet September 21, 2010
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2007, 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
FN6148.5
2
FN6148.5
September 21, 2010
Block Diagram
Ordering Information
PART NUMBER
(Note)
MAXIMUM
PIXEL RATE
(MHz)
TEMPERATURE
RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL98001IQZ-140 140 -40 to +85 128 MQFP MDP0055
ISL98001CQZ-140 140 0 to +70 128 MQFP MDP0055
ISL98001CQZ-170 170 0 to +70 128 MQFP MDP0055
ISL98001CQZ-210 210 0 to +70 128 MQFP MDP0055
ISL98001CQZ-275 275 0 to +70 128 MQFP MDP0055
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
G
IN
1
RGB
GND
1
G
IN
2
RGB
GND
2
V
IN
+
V
IN
-
PGA
8-BIT ADC
+
V
CLAMP
R
IN
1
R
IN
2
V
IN
+
V
IN
-
PGA
8-BIT ADC
+
V
CLAMP
B
IN
1
B
IN
2
V
IN
+
V
IN
-
PGA
8-BIT ADC
+
V
CLAMP
OFFSET
DAC
OFFSET
DAC
OFFSET
DAC
ABLC™
ABLC™
ABLC™
8
10
8
10
8
10
8
B
S
[7:0]
8
B
P
[7:0]
8
G
S
[7:0]
8
G
P
[7:0]
8
R
S
[7:0]
8
R
P
[7:0]
SOG
IN
1
SOG
IN
2
HSYNC
IN
1
HSYNC
IN
2
VSYNC
IN
1
VSYNC
IN
2
CLOCKINV
XTAL
IN
XTAL
OUT
SCL
SDA
SADDR
SYNC
PROCESSING
DIGITAL PLL
AFE CONFIGURATION
AND CONTROL
DATACLK
DATACLK
HS
OUT
VS
OUT
SERIAL
INTERFACE
OUTPUT DATA FORMATTER
HSYNC
OUT
VSYNC
OUT
XCLK
OUT
ISL98001
3
FN6148.5
September 21, 2010
Absolute Maximum Ratings Thermal Information
Voltage on V
A
, V
D
, or V
X
(referenced to GND
A
= GND
D
= GND
X
) . . . . . . . . . . . . . . . . 4.0V
Voltage on any Analog Input Pin
(referenced to GND
A
). . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V
A
Voltage on any Digital Input Pin
(referenced to GND
D
) . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.0V
Current into any Output Pin . . . . . . . . . . . . . . . . . . . . . . . . . . ±20mA
ESD Classification
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200V
Thermal Resistance, Typical (Note 1) θ
JA
(°C/W)
MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Maximum Biased Junction Temperature . . . . . . . . . . . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature
Commercial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . V
A
= V
D
= V
X
= 3.3V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications Specifications apply for V
A
= V
D
= V
X
= 3.3V, pixel rate = 140MHz for ISL98001-140, 170MHz for
ISL98001-170, 210MHz for ISL98001-210, or 275MHz for ISL98001-275, f
XTAL
= 25MHz, T
A
= +25°C, unless
otherwise noted.
SYMBOL PARAMETER COMMENT MIN TYP MAX UNIT
FULL CHANNEL CHARACTERISTICS
Conversion Rate Per channel
ISL98001-140 10 140 MHz
ISL98001-170 10 170 MHz
ISL98001-210 10 210 MHz
ISL98001-275 To achieve rated 275MHz speeds,
see “Initialization” on page 26.
10 275 MHz
ADC Resolution 8 Bits
Missing Codes Guaranteed monotonic None
DNL
(Full-
Channel)
Differential Non-Linearity
ISL98001-140 ±0.5 +1.0/-0.9 LSB
ISL98001-170 ±0.5 +1.0/-0.9 LSB
ISL98001-210 ±0.6 +1.0/-0.9 LSB
ISL98001-275 ±0.7 +1.2/-0.9 LSB
INL
(Full-
Channel)
Integral Non-Linearity
ISL98001-140 ±1.1 ±2.75 LSB
ISL98001-170 ±1.1 ±3.25 LSB
ISL98001-210 ±1.25 ±3.25 LSB
ISL98001-275 ±1.6 ±3.75 LSB
Gain Adjustment Range ±6 dB
Gain Adjustment Resolution 8 Bits
Gain Matching Between Channels Percent of full scale ±1 %
Full Channel Offset Error,
ABLC enabled
ADC LSBs,
over time and temperature
±0.125 ±0.5 LSB
Offset Adjustment Range
(ABLC enabled or disabled)
ADC LSBs (See “Automatic Black
Level Compensation (ABLC™)
and Gain Control” on page 19)
±127 LSB
ISL98001

ISL98001CQZ-210

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Analog Front End - AFE ISL98001CQZ TRPL VID DIGIZER W/DIGTL PLL
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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