DAC1405D750 6 © IDT 2012. All rights reserved.
Product data sheet Rev. 06 — 2 July 2012 34 of 41
Integrated Device Technology
DAC1405D750
Dual 14-bit DAC, up to 750 Msps; 4 and 8 interpolating
Figure 16 provides an example of a connection to an AQM with a 3.3 V
I(cm)
common-mode input level.
The auxiliary DACs can be used to control the offset in a precise range or with precise
steps.
Figure 17 provides an example of a DC interface with the auxiliary DACs to an AQM with
a 1.7 V
I(cm)
common-mode input level.
Fig 16. An example of a DC interface to a 3.3 V
I(cm)
AQM
Fig 17. An example of a DC interface to a 1.7 V
I(cm)
AQM using auxiliary DACs
001aaj542
54.9 Ω
54.9 Ω
237 Ω
237 Ω
V
DDA(3V3)
IOUTnP
IOUTnN
BBP
BBN
AQM (V
i(cm)
= 3.3 V)
750 Ω 750 Ω
5 V
1.27 kΩ 1.27 kΩ
(1)
IOUTnP/IOUTnN; V
o(cm)
= 2.75 V; V
o(dif)(p-p)
= 1.97 V
(2)
BBP/BBN; V
i(cm)
= 3.3 V; V
i(dif)(p-p)
= 1.5 V
(1) (2)
001aal655
51.1 Ω
51.1 Ω
442 Ω
442 Ω
V
DDA(3V3)
IOUTnP
IOUTnN
0 mA to 20 mA
BBP
BBN
AQM (V
i(cm)
= 1.7 V)
698 Ω 698 Ω
51.1 Ω 51.1 Ω
AUXnP
AUXnN
1.1 mA (typ.)
(1)
IOUTnP/IOUTnN; V
o(cm)
= 2.67 V; V
o(dif)(p-p)
= 1.94 V
(2)
BBP/BBN; V
i(cm)
= 1.7 V; V
i(dif)(p-p)
= 1.23 V; offset correction up to 50 mV
(1) (2)
DAC1405D750 6 © IDT 2012. All rights reserved.
Product data sheet Rev. 06 — 2 July 2012 35 of 41
Integrated Device Technology
DAC1405D750
Dual 14-bit DAC, up to 750 Msps; 4 and 8 interpolating
Figure 18 provides an example of a DC interface with the auxiliary DACs to an AQM with
a 3.3 V
I(cm)
common-mode input level.
The constraints to adjust the interface are the output compliance range of the DAC and
the auxiliary DACs, the input common-mode level of the AQM, and the range of offset
correction.
10.14.3 AC interface to an Analog Quadrature Modulator (AQM)
When the AQM common-mode voltage is close to ground, the DAC1405D750 must be
AC-coupled and the auxiliary DACs are needed for offset correction.
Figure 19 provides an example of a connection to an AQM with a 0.5 V
I(cm)
common-mode input level using auxiliary DACs.
Fig 18. An example of a DC interface to a 3.3 V
I(cm)
AQM using auxiliary DACs
001aaj544
54.9 Ω
54.9 Ω
237 Ω
237 Ω
3.3 V
IOUTnP
IOUTnN
AUXnP
AUXnN
BBP
BBN
AQM (V
i(cm)
= 3.3 V)
750 Ω 750 Ω
5 V
634 Ω 634 Ω
442 Ω 442 Ω
(1)
IOUTnP/IOUTnN; V
o(cm)
= 2.75 V; V
o(dif)(p-p)
= 1.96 V
(2)
BBP/BBN; V
i(cm)
= 3.3 V; V
i(dif)(p-p)
= 1.5 V; offset correction up to 36 mV
(1) (2)
DAC1405D750 6 © IDT 2012. All rights reserved.
Product data sheet Rev. 06 — 2 July 2012 36 of 41
Integrated Device Technology
DAC1405D750
Dual 14-bit DAC, up to 750 Msps; 4 and 8 interpolating
10.15 Power and grounding
In order to obtain optimum performance, it is recommended that the 1.8 V analog power
supplies on pins 5, 11, 71, 77 and 99 should not be connected with the ones on pins 6, 70,
79, 81, 83, 93, 95 and 97 on the top layer.
To optimize the decoupling, the power supplies should be decoupled with the following
ground pins:
V
DDD(1V8)
: pin 26 with 27; pin 32 with 33; pin 36 with 37; pin 40 with 39; pin 44 with 43
and pin 50 with 49.
V
DD(IO)(3V3)
: pin 16 with 17 and pin 60 with 59.
V
DDA(1V8)
: pin 5 with 4; pin 6 with 7; pin 11 with 10; pin 71 with 72; pin 77 with 78; pins
79, 81, 83 with 80, 82, 84; pins 93, 95, 97 with 92, 94, 96 and pin 99 with 98.
V
DDA(3V3)
: pin 1 with 100 and pin 75 with 76.
Fig 19. An example of an AC interface to a 0.5 V
I(cm)
AQM using auxiliary DACs
001aaj589
66.5 Ω
66.5 Ω
10 nF
V
DDA(3V3)
IOUTnP
IOUTnN
0 mA to 20 mA
BBP
BBN
AQM (V
i(cm)
= 0.5 V)
2 kΩ 2 kΩ
5 V
174 Ω 174 Ω
34 Ω 34 Ω
AUXnP
AUXnN
1.1 mA (typ.)
10 nF
(1)
IOUTnP/IOUTnN; V
o(cm)
= 2.65 V; V
o(dif)(p-p)
= 1.96 V
(2)
BBP/BBN; V
i(cm)
= 0.5 V; V
i(dif)(p-p)
= 1.96 V; offset correction up to 70 mV
(1) (2)

DAC1405D750HW-C18

Mfr. #:
Manufacturer:
Description:
IC DAC 14BIT A-OUT 100HTQFP
Lifecycle:
New from this manufacturer.
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