MAX16826
Programmable, Four-String HB LED Driver with
Output-Voltage Optimization and Fault Detection
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PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
ADC (DR1–DR4, OVP)
Maximum Error E
MAX
±50 mV
ADC Single Bit Acquisition
Latency
(Note 4) 2 μs
DR Channel Sample Time t
DR,SMPL
190 ms
OVP Channel Sample Time t
OVP,SMPL
20 μs
Full-Scale Input Voltage V
FS
1.215 1.24 1.2550 V
Least Significant Bit V
LSB
9.76 mV
DR Input Bias Current I
DR
0V < V
DR_
< 5.5V -100 0 +100 nA
DRAIN FAULT COMPARATORS (DR1–DR4) (Shorted LED String Comparator)
Drain Fault Comparator
Threshold
V
DFTH
Voltage to drive DL1–DL4 low 1.4 1.52 1.63 V
Drain Fault Comparator Delay t
DFD
10mV overdrive 1 μs
LINEAR REGULATORS (DL1–DL4, CS1–CS4)
Transconductance Gm ΔI = -500μA 75 mS
Maximum Output Current I
DL
Sourcing or sinking 15 mA
CS1–CS4 Input Bias Current I
CS
0V < V
CS
< 5.5V -100 0 +100 nA
CS_ = DL_, FB DAC full scale;
MAX16826 only
306 316 324
CS1–CS4 Regulation Voltage
Maximum
V
CS,MAX
CS_ = DL_, FB DAC full scale;
MAX16826B only
308 318 328
mV
CS_ = DL_, FB DAC minus full scale;
MAX16826 only
90 97 105
CS1–CS4 Regulation Voltage
Minimum
V
CS,MIN
CS_ = DL_, FB DAC minus full scale;
MAX16826B only
90 99 109
mV
CS1–CS4 Regulation Voltage LSB V
CS,LSB
CS_ = DL_, FB DAC 1-bit transition 1.72 mV
ELECTRICAL CHARACTERISTICS (continued)
(V
IN
= 12V, R19 = 2kΩ, C33 = 2200pF, R17 = 1.27kΩ, C
DL_
= 0.01μF, T
J
= -40°C to +125°C, unless otherwise noted. Typical values
are at T
A
= +25°C.) (Note 1)
Note 1: All devices are 100% production tested at T
J
= +25°C and T
J
= +125°C. Limits to -40°C are guaranteed by design.
Note 2: I
CC
includes the internal bias currents and the current used by the gate drivers to drive DL, DL1, DL2, DL3, and DL4.
Note 3: Minimum frequency to allow the internal ADC to complete at least one measurement. t
ON
is the on-time with the LED current
in regulation.
Note 4: Minimum LED current pulse duration, which is required to correctly acquire 1 bit.
