PCA9698 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Product data sheet Rev. 3 — 3 August 2010 34 of 48
NXP Semiconductors
PCA9698
40-bit Fm+ I
2
C-bus advanced I/O port with RESET, OE and INT
[1] V
DD
must be lowered to 0.2 V in order to reset part.
[2] Each bit must be limited to a maximum of 25 mA and the total package limited to the package maximum limit due to internal busing
limits.
11.1 Performance curves
Interrupt INT
I
OL
LOW-level output current V
OL
=0.4V 6 - - mA
C
o
output capacitance - 3 5 pF
Inputs RESET
and OE
V
IL
LOW-level input voltage −0.5 - +0.8 V
V
IH
HIGH-level input voltage 2 - 5.5 V
I
LI
input leakage current −1- +1 μA
C
i
input capacitance - 3 5 pF
Inputs AD0, AD1, AD2
V
IL
LOW-level input voltage −0.5 - +0.3V
DD
V
V
IH
HIGH-level input voltage 0.7V
DD
-5.5V
I
LI
input leakage current −1- +1 μA
C
i
input capacitance - 3.5 5 pF
Table 14. Static characteristics …continued
V
DD
= 2.3 V to 5.5 V; V
SS
=0V; T
amb
=
−
40
°
C to +85
°
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
f
SCL
= 400 kHz; all I/Os unloaded SCL = V
DD
; all I/Os unloaded
Fig 26. Supply current as a function of temperature Fig 27. Standby current as a function of temperature
T
amb
(°C)
−50 100500
002aab955
0.4
0.8
1.2
I
DD
(μA)
0
3.3 V
2.3 V
V
DD
= 5 V
T
amb
(°C)
−50 100500
002aab956
0.4
0.8
1.2
I
DD
(μA)
0
3.3 V
2.3 V
V
DD
= 5 V
