AD7732
Rev. A | Page 9 of 32
TYPICAL PERFORMANCE CHARACTERISTICS
AIN DIFFERENTIAL VOLTAGE – V
INL – ppm
0
10
20
30
40
50
60
20151050 5101520
MCLK = 6.144MHz
V
CM
= 0V
FILTER WORD
NO MISSING CODES
16
17
18
19
20
21
22
23
24
25
12345678910
CHOP = 1
Figure 8. Typical INL vs. AIN Differential Voltage, AIN Common-Mode
Voltage = 0 V, MCLK = 6.144 MHz, BIAS(+) = BIAS(–) = 2.5 V
Figure 5. No Missing Codes Performance, Chopping Enabled
AIN COMMON-MODE VOLTAGE – V
INL – ppm
0
10
20
30
40
50
60
–15 –10 –5 0 5 10 15
MCLK = 6.144MHz
FILTER WORD
NO MISSING CODES
16
17
18
19
20
21
22
23
24
25
12345678910
CHOP = 0
Figure 9. Typical INL vs. AIN Common-Mode Voltage, ±10 V Differential
Signal, MCLK = 6.144 MHz, BIAS(+) = BIAS(–) = 2.5 V
Figure 6. No Missing Codes Performance, Chopping Disabled
MCLK FREQUENCY – MHz
INL – ppm
0
5
10
15
01234567
V
CM
= 0V
MCLK FREQUENCY – MHz
AV
DD
+ DV
DD
CURRENT – mA
0
5
10
15
20
01234567
Figure 7. Typical INL vs. MCLK Frequency, ±10 V Differential Signal, AIN
Common-Mode Voltage = 0 V, BIAS(+) = BIAS(–) = 2.5 V
Figure 10. Typical Supply Current vs. MCLK Frequency,
Normal Operation, Converting
AD7732
Rev. A | Page 10 of 32
OUTPUT NOISE AND RESOLUTION SPECIFICATION
The AD7732 can be operated with chopping enabled or
disabled, allowing the ADC to be programmed to either
optimize the throughput rate and channel switching time or to
optimize the offset drift performance. Noise tables for these two
primary modes of operation are outlined below for a selection
of output rates and settling times.
The AD7732 noise performance depends on the selected
chopping mode, the filter word (FW) value, and the selected
analog input range. The AD7732 noise will not vary
significantly with MCLK frequency.
Chopping Enabled
The first mode, in which the AD7732 is configured with
chopping enabled (CHOP = 1), provides very low noise with
lower output rates. Table 4 to Table 6 show the –3 dB
frequencies and typical performance versus the channel
conversion time and equivalent output data rate, respectively.
Table 4 shows the typical output rms noise. Table 5 shows the
typical effective resolution based on rms noise. Table 6 shows
the typical output peak-to-peak resolution, representing values
for which there will be no code flicker within a 6-sigma limit.
The peak-to-peak resolutions are not calculated based on rms
noise but on peak-to-peak noise.
These typical numbers are generated from 4096 data samples
acquired in continuous conversion mode with an analog input
voltage set to 0 V and MCLK = 6.144 MHz. The conversion
time is selected via the channel conversion time register.
Table 4. Typical Output RMS Noise in μV vs. Conversion Time and Input Range with Chopping Enabled
FW Conversion Time
Register
Conversion Time
(μs)
Output Data Rate
(Hz)
–3 dB Frequency
(Hz)
RMS Noise
(μV)
127 FFh 2686 372 200 9.6
46 AEh 999 1001 520 15.5
22 96h 499 2005 1040 22.7
17 91h 395 2534 1300 26.1
8 88h 207 4826 2500 39.2
6 86h 166 6041 3100 46.0
2 82h 82 12166 6300 120.0
Table 5. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled
Input Range/Effective Resolution (Bits) FW Conversion Time
Register
Conversion Time
(μs)
Output Data Rate
(Hz)
–3 dB Frequency
(Hz)
±10 V 0 V to +10 V ±5 V 0 V to +5 V
127 FFh 2686 372 200 21.0 20.0 20.0 19.0
46 AEh 999 1001 520 20.3 19.3 19.3 18.3
22 96h 499 2005 1040 19.7 18.7 18.7 17.7
17 91h 395 2534 1300 19.5 18.5 18.5 17.5
8 88h 207 4826 2500 19.0 18.0 18.0 17.0
6 86h 166 6041 3100 18.7 17.7 17.7 16.7
2 82h 82 12166 6300 17.3 16.3 16.3 15.3
Table 6. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Enabled
Input Range/Peak-to-Peak Resolution (Bits) FW Conversion Time
Register
Conversion Time
(μs)
Output Data Rate
(Hz)
–3 dB Frequency
(Hz)
±10 V 0 V to +10 V ±5 V 0 V to +5 V
127 FFh 2686 372 200 18.1 17.1 17.1 16.1
46 AEh 999 1001 520 17.4 16.4 16.4 15.4
22 96h 499 2005 1040 16.9 15.9 15.9 14.9
17 91h 395 2534 1300 16.7 15.7 15.7 14.7
8 88h 207 4826 2500 16.2 15.2 15.2 14.2
6 86h 166 6041 3100 15.8 14.8 14.8 13.8
2 82h 82 12166 6300 15.0 13.4 13.4 12.4
AD7732
Rev. A | Page 11 of 32
Chopping Disabled
The second mode, in which the AD7732 is configured with
chopping disabled (CHOP = 0), provides faster conversion time
while still maintaining high resolution. Table 7 to Table 9 show
the –3 dB frequencies and typical performance versus the
channel conversion time and equivalent output data rate,
respectively. Table 7 shows the typical output rms noise. Table 8
shows the typical effective resolution based on the rms noise.
Table 9 shows the typical output peak-to-peak resolution,
representing values for which there will be no code flicker
within a 6-sigma limit. The peak-to-peak resolutions are not
calculated based on rms noise but on peak-to-peak noise.
These typical numbers are generated from 4096 data samples
acquired in continuous conversion mode with an analog input
voltage set to 0 V and MCLK = 6.144 MHz. The conversion
time is selected via the channel conversion time register.
Table 7. Typical Output RMS Noise in μV vs. Conversion Time and Input Range with Chopping Disabled
FW Conversion Time
Register
Conversion Time
(μs)
Output Data Rate
(Hz)
–3 dB Frequency
(Hz)
RMS Noise
(μV)
127 7Fh 1357 737 670 13.2
92 5Ch 992 1008 920 15.5
44 2Ch 492 2032 1850 22.7
35 23h 398 2511 2290 26.3
16 10h 200 4991 2500 39.0
8 08h 117 8545 7780 57.0
3 03h 65 15398 14000 132
Table 8. Typical Effective Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled
Input Range/Effective Resolution (Bits) FW Conversion Time
Register
Conversion Time
(μs)
Output Data Rate
(Hz)
–3 dB Frequency
(Hz)
±10 V 0 V to +10 V ±5 V 0 V to +5 V
127 7Fh 1357 737 670 20.5 19.5 19.5 18.5
92 5Ch 992 1008 920 20.3 19.3 19.3 18.3
44 2Ch 492 2032 1850 19.7 18.7 18.7 17.7
35 23h 398 2511 2290 19.5 18.5 18.5 17.5
16 10h 200 4991 2500 19.0 18.0 18.0 17.0
8 08h 117 8545 7780 18.4 17.4 17.4 16.4
3 03h 65 15398 14000 17.2 16.2 16.2 15.2
Table 9. Typical Peak-to-Peak Resolution in Bits vs. Conversion Time and Input Range with Chopping Disabled
Input Range/Peak-to-Peak Resolution (Bits) FW Conversion Time
Register
Conversion Time
(μs)
Output Data Rate
(Hz)
–3 dB Frequency
(Hz)
±10 V 0 V to +10 V ±5 V 0 V to +5 V
127 7Fh 1357 737 670 17.6 16.6 16.6 15.6
92 5Ch 992 1008 920 17.4 16.4 16.4 15.4
44 2Ch 492 2032 1850 16.8 15.8 15.8 14.8
35 23h 398 2511 2290 16.6 15.6 15.6 14.6
16 10h 200 4991 2500 16.1 15.1 15.1 14.1
8 08h 117 8545 7780 15.5 14.5 14.5 13.5
3 03h 65 15398 14000 14.3 13.3 13.3 12.3

AD7732BRUZ-REEL7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 2Ch+/-10V InputRange 24-Bit
Lifecycle:
New from this manufacturer.
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