AD7732
Rev. A | Page 30 of 32
I/O Port
The AD7732 P0 pin can be used as a general-purpose digital
I/O pin. The P1 pin (
SYNC
/P1) can be used as a general-
purpose digital I/O pin or to synchronize the AD7732 with
other devices in the system. When the SYNC bit in the I/O port
register is set and the
SYNC
pin is low, the AD7732 does not
process any conversion. If it is put into single conversion mode,
continuous conversion mode, or any calibration mode, the
AD7732 waits until the
SYNC
pin goes high and then starts
operation. This allows conversion to start from a known point
in time, i.e., the rising edge of the
SYNC
pin.
The digital P0 and P1 voltage is referenced to the analog
supplies. When configured as inputs, the pins should be tied
high or low.
Calibration
The AD7732 provides zero-scale self-calibration and zero- and
full-scale system calibration capability that can effectively
reduce the offset error and gain error to the order of the noise.
After each conversion, the ADC conversion result is scaled
using the ADC calibration registers and the relevant channel
calibration registers before being written to the data register.
For unipolar ranges:
Data = ((ADC result – ADC ZS Cal. reg.)
× ADC FS Reg./200000h – Ch. ZS Cal. reg.)
× Ch. FS Cal. reg./200000h
For bipolar ranges:
Data = ((ADC result – ADC ZS Cal. reg.)
× ADC FS Reg./400000h + 800000h – Ch. ZS Cal.
reg.)
× Ch. FS Cal. reg./200000h
Where the ADC result is in the range of 0 to FFFFFFh.
Note that the channel zero-scale calibration register has the
format of a sign bit and a 22-bit channel offset value. It is
strongly recommended that the user not change the ADC full-
scale register.
To start any calibration, write the relevant mode bits to the
AD7732 mode register. After the calibration is complete, the
contents of the corresponding calibration registers are updated,
all RDY bits in the ADC status register are set, the
RDY
pin
goes low, and the AD7732 reverts to idle mode. The calibration
duration is the same as the conversion time configured on the
selected channel. A longer conversion time gives less noise and
yields a more exact calibration; therefore, use at least the default
conversion time to initiate any calibration.
ADC Zero-Scale Self-Calibration
The ADC zero-scale self-calibration can reduce the offset error
in the chopping disabled mode. If repeated after a temperature
change, it can also reduce the offset drift error in the chopping
disabled mode.
The zero-scale self-calibration is performed on internally
shorted ADC inputs. The negative analog input terminal on the
selected channel is used to set the ADC zero-scale calibration
common mode. Therefore, either the negative terminal of the
selected differential pair or the AINCOM on the single-ended
channel configuration should be driven to a proper common-
mode voltage.
It is strongly recommended that the ADC zero-scale calibration
register should only be updated as part of a zero-scale self-
calibration.
Per Channel System Calibration
If the per channel system calibrations are used, these should be
initiated in the following order: a channel zero-scale system
calibration, followed by a channel full-scale system calibration.
The system calibration is affected by the ADC zero-scale and
full-scale calibration registers. Therefore, if both self-calibration
and system calibration are used in the system, an ADC full-
scale self-calibration should be performed first, followed by a
system calibration cycle.
While executing a system calibration, the fully settled system
zero-scale voltage signal or system full-scale voltage signal must
be connected to the selected channel analog inputs.
The per channel calibration registers can be read, stored, or
modified and written back to the AD7732. Note that when
writing the calibration registers the AD7732 must be in idle
mode. Note that outside the specified calibration range,
calibration is possible but the performance may degrade (see
the System Calibration section in Table 1).
