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USB3813I-1080XY-TR

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57
USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications
Datasheet
DS00001715A-page 40
2014 Microchip Technology Inc.
8.2 Flex Connect
This feature allows the upstream port to be swapped with downstream physical port 1. Only
downstream port 1 can be swapped physically. Using port remapping, any logical port (number
assignment) can be swapped with the upstream port (non-physical).
Flex Connect is enabled/disabled via two control bits in the Connect Configuration Register. The
FLEXCONNECT configuration bit switches the port, and EN_FLEX_MODE enables the mode.
8.2.1 Port Control
Once EN_FLEX_MODE bit is set, the functions of certain pins change, as outlined below.
If EN_FLEX_MODE is set and FLEXCONNECT is not set:
1. SUSPEND outputs ‘0’ to keep any upstream power controller off
If EN_FLEX_MODE is set and FLEXCONNECT is
set:
1. The normal upstream VBUS pin becomes a don’t care
2. SUSPEND becomes PRTPWR1/OCS1_N for the port power controller for the connector port
8.3 Resets
The device has the following chip level reset sources:
Power-On Reset (POR)
External Chip Reset (RESET_N)
USB Bus Reset
8.3.1 Power-On Reset (POR)
A power-on reset occurs whenever power is initially supplied to the device, or if power is removed and
reapplied to the device. A timer within the device will assert the internal reset per the specifications
listed in Section 9.5.1, "Power-On Configuration Strap Valid Timing," on page 49.
8.3.2 External Chip Reset (RESET_N)
A valid hardware reset is defined as assertion of RESET_N, after all power supplies are within
operating range, per the specifications in Section 9.5.2, "Reset and Configuration Strap Timing," on
page 50. While reset is asserted, the device (and its associated external circuitry) enters Standby Mode
and consumes minimal current.
Assertion of RESET_N causes the following:
1. The PHY is disabled and the differential pairs will be in a high-impedance state.
2. All transactions immediately terminate; no states are saved.
3. All internal registers return to the default state.
4. The external crystal oscillator is halted.
5. The PLL is halted.
6. The HSIC Strobe and Data pins are driven low.
USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications
Datasheet
2014 Microchip Technology Inc. DS00001715A-page 41
Note: All power supplies must have reached the operating levels mandated in Section 9.2, "Operating
Conditions**," on page 45, prior to (or coincident with) the assertion of RESET_N.
8.3.3 USB Bus Reset
In response to the upstream port signaling a reset to the device, the device performs the following:
Note: The device does not propagate the upstream USB reset to downstream devices.
1. Sets default address to 0.
2. Sets configuration to: Unconfigured.
3. Moves device from suspended to active (if suspended).
4. Complies with Section 11.10 of the USB 2.0 Specification for behavior after completion of the
reset sequence.
The host then configures the device in accordance with the USB Specification.
8.4 Reference Clock
The device’s reference clock (REFCLK) input can be driven with a square wave from 0V to VDD33
and is compatible with several different reference frequencies as shown in Table 8.4. The REFSEL[1:0]
inputs must be configured to select the default input reference clock frequency that matches the clock
frequency applied to REFCLK. The REFSEL[1:0] inputs are latched upon entering the HUB.config
stage and are ignored afterward. REFSEL[1:0] settings are provided in Table 8.4.
Note: The frequencies shown for each REFSEL[1:0] combination in Table 8.4 are the default values.
The frequencies associated with each specific REFSEL[1:0] value can be customized to
support other frequencies. Refer to the Pro-Touch Configuration Tool documentation for
additional information.
Table 8.4 Default Reference Clock Frequencies
REFSEL[1:0] FREQUENCY (MHz)
‘00’ 38.4
‘01’ 26.0
‘10’ 19.2
‘11’ 12.0
USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications
Datasheet
DS00001715A-page 42
2014 Microchip Technology Inc.
8.5 Hub Connect (HUB_CONN)
HUB_CONN is the equivalent of VBUS. The device will connect to the upstream host when either of
the following conditions are met:
If there is no I
2
C master present, the device will attach when HUB_CONN is high.
If there is an I
2
C master present, the device will wait until the master has configured the device
and signalled completion by setting USB_ATTACH in the STCD register. Once the USB_ATTACH
bit it set, the device will connect once HUB_CONN is high.
Refer to Section 5.1.9, "Hub Connect Stage (Hub.Connect)," on page 22 for additional information.
8.6 Link Power Management (LPM)
The device supports the L0 (On), L1 (Sleep), and L2 (Suspend) link power management states per
the USB 2.0 Link Power Management Addendum. These supported LPM states offer low transitional
latencies in the tens of microseconds versus the much longer latencies of the traditional USB
suspend/resume in the tens of milliseconds. The supported LPM states are detailed in Table 8.5. For
additional information, refer to the USB 2.0 Link Power Management Addendum.
Note: State change timing is approximate and is measured by change in power consumption.
Note: System clocks are stopped only in suspend mode or when power is removed from the device.
8.7 Suspend (SUSPEND)
When enabled, the SUSPEND signal can be used to indicate that the entire hub has entered the USB
suspend state and that VBUS current consumption should be reduced in accordance with the USB
specification. Selective suspend set by the host on downstream hub ports have no effect on this signal
because there is no requirement to reduce current consumption from the upstream VBUS. Suspend
can be used by the system to monitor and dynamically adjust how much current the PMIC draws from
VBUS to charge the battery in the system during a USB session. Because it is a level indication, it will
assert or negate to reflect the current status of suspend without any interaction through the SMBus.
A negation of this signal indicates no level suspend interrupt and device has been configured by the
USB Host. The full configured current can be drawn from the USB VBUS pin on the USB connector
for charging - up to 500mA - depending on descriptor settings. When asserted, this signal indicates a
suspend interrupt or that the device has not yet been configured by USB Host. The current draw can
be limited by the system according to the USB specification. The USB specification limits current to
100mA before configuration, and up to 12.5mA in USB suspend mode.
Table 8.5 LPM State Definitions
STATE DESCRIPTION ENTRY/EXIT TIME TO L0
L2 Suspend Entry: ~3 ms
Exit: ~2 ms
L1 Sleep Entry: ~65 us
Exit: ~100 us
L0 Fully Enabled (On) -
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57

USB3813I-1080XY-TR

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Buy USB3813I-1080XY-TR
Manufacturer:
Microchip Technology
Description:
USB Interface IC USB 2.0 Hi-Spd 3-pt Hub Cntlr
Lifecycle:
New from this manufacturer.
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