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AD9515BCPZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29
Data Sheet AD9515
Rev. A | Page 15 of 28
TYPICAL PERFORMANCE CHARACTERISTICS
OUTPUT FREQUENCY (MHz)
POWER (W)
16001200800400
0.1
0.3
0.2
05597-009
LVPECL (DIV ON)
LVDS (DIV ON)
LVPECL (DIV = 1)
Figure 8. Power vs. Frequency—LVPECL, LVDS
START 300kHz STOP 5GHz
05597-097
Figure 9. CLK Smith Chart (Evaluation Board)
OUTPUT FREQUENCY (MHz)
POWER (W)
0 12080 100604020
0.2
0.5
0.4
0.3
05597-008
LVPECL (DIV ON) + CMOS (DIV ON)
LVPECL (DIV OFF) + CMOS (DIV OFF)
Figure 10. Power vs. Frequency—LVPECL, CMOS
AD9515 Data Sheet
Rev. A | Page 16 of 28
VERT 500mV/DIV HORIZ 200ps/DIV
05597-095
Figure 11. LVPECL Differential Output @ 1600 MHz
VERT 100mV/DIV HORIZ 500ps/DIV
05597-010
Figure 12. LVDS Differential Output @ 800 MHz
VERT 500mV/DIV HORIZ 1ns/DIV
05597-011
Figure 13. CMOS Single-Ended Output @ 250 MHz with 10 pF Load
OUTPUT FREQUENCY (MHz)
DIFFERENTIAL SWING (V p-p)
100 16001100600
1.2
1.3
1.4
1.5
1.6
1.7
1.8
05597-012
Figure 14. LVPECL Differential Output Swing vs. Frequency
OUTPUT FREQUENCY (MHz)
DIFFERENTIAL SWING (mV p-p)
100 900700500300
500
750
700
650
600
550
05597-013
Figure 15. LVDS Differential Output Swing vs. Frequency
OUTPUT FREQUENCY (MHz)
OUTPUT (V
PK
)
0 600500400300200100
0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
2pF
10pF
20pF
05597-014
Figure 16. CMOS Single-Ended Output Swing vs. Frequency and Load
Data Sheet AD9515
Rev. A | Page 17 of 28
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–110
–130
–120
–140
–150
–160
05597-051
Figure 17. Additive Phase Noise—LVPECL, Divide = 1, 245.76 MHz
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–80
–90
–110
–100
–120
–130
–140
–150
–160
05597-048
Figure 18. Additive Phase Noise—LVDS, Divide = 1, 245.76 MHz
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–100
–110
–120
–130
–140
–150
–160
05597-045
Figure 19. Additive Phase Noise—CMOS, Divide = 1, 245.76 MHz
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–110
–130
–120
–140
–150
–160
05597-052
Figure 20. Additive Phase Noise—LVPECL, Divide = 1, 622.08 MHz
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–80
–90
–110
–100
–120
–130
–140
–150
–160
05597-049
Figure 21. Additive Phase Noise—LVDS, Divide = 2, 122.88 MHz
OFFSET (Hz)
L(f) (dBc/Hz)
10 10M1M100k10k1k100
–170
–100
–110
–120
–130
–140
–150
–160
05597-046
Figure 22. Additive Phase Noise—CMOS, Divide = 4, 61.44 MHz
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29

AD9515BCPZ

Mfr. #:
Buy AD9515BCPZ
Manufacturer:
Analog Devices Inc.
Description:
Clock Drivers & Distribution 1.6GHz Dividers Delay Adj 2 Outputs
Lifecycle:
New from this manufacturer.
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