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AsyncCellularRAM_2.fm - Rev. G 10/05 EN
22 ©2003 Micron Technology, Inc. All rights reserved.
64Mb: 4 Meg x 16 Async/Page CellularRAM 1.0 Memory
Electrical Characteristics
Notes: 1. High-Z to Low-Z timings are tested with the circuit shown in Figure 15 on page 21. The
Low-Z timings measure a 100mV transition away from the High-Z (V
CCQ/2) level toward
either VOH or VOL.
2. Low-Z to High-Z timings are tested with the circuit shown in Figure 15 on page 21. The
High-Z timings measure a 100mV transition from either V
OH or VOL toward VCCQ/2.
3. Page-mode enabled only.
Table 11: READ Cycle Timing Requirements
Parameter Symbol
-70 -85
Units NotesMin Max Min Max
Address Access Time
t
AA
70 85 ns
Page Access Time
t
APA
20 25 ns
LB#/UB# Access Time
t
BA
70 85 ns
LB#/UB# Disable to High-Z Output
t
BHZ
88ns2
LB#/UB# Enable to Low-Z Output
t
BLZ
10 10 ns 1
Maximum CE# Pulse Width
t
CEM
88µs3
Chip Select Access Time
t
CO
70 85 ns
Chip Disable to High-Z Output
t
HZ
88ns2
Chip Enable to Low-Z Output
t
LZ
10 10 ns 1
Output Enable to Valid Output
t
OE
20 20 ns
Output Hold from Address Change
t
OH
55ns
Output Disable to High-Z Output
t
OHZ
88ns2
Output Enable to Low-Z Output
t
OLZ
55ns1
Page Cycle Time
t
PC
20 25 ns
Read Cycle Time
t
RC
70 85 ns
