DS638F2 Copyright 2010 Cirrus Logic (All Rights Reserved) 21
EP9315
Enhanced Universal Platform SOC Processor
Static Memory 32-bit Read on 8-bit External Bus
Parameter Symbol Min Typ Max Unit
AD setup to CSn assert time
t
ADs
t
HCLK
-
-ns
CSn assert to Address transition time
t
AD1
-
t
HCLK
× (WST1 + 1)
-ns
Address assert time
t
AD2
-
t
HCLK
× (WST1 + 1)
-ns
AD transition to CSn deassert time
t
AD3
-
t
HCLK
× (WST1 + 2)
-ns
AD hold from CSn deassert time
t
ADh
t
HCLK
--ns
RDn assert time
t
RDpwL
-
t
HCLK
× (4 × WST1 + 5)
-ns
CSn to RDn delay time
t
RDd
-- 3ns
CSn assert to DQMn assert delay time
t
DQMd
-- 1ns
DA setup to AD transition time
t
DAs1
15 - - ns
DA setup to RDn deassert time
t
DAs2
t
HCLK
+ 12
--ns
DA hold from AD transition time
t
DAh1
0- -ns
DA hold from RDn deassert time
t
DAh2
0- -ns
Figure 8. Static Memory Multiple Word Read 8-bit Cycle Timing Measurement
CSn
WRn
RDn
DA
AD
DQMn
t
ADs
t
AD1
t
AD2
t
AD2
t
DAs1
t
RDd
t
DAh1
t
DAh1
t
DAh1
t
DAs1
t
DAs1
t
DAs2
t
DAh2
t
ADh
WAIT
t
RDd
t
DQMd
t
AD3