57 Copyright 2010 Cirrus Logic (All Rights Reserved) DS638F2
EP9315
Enhanced Universal Platform SOC Processor
Figure 40. 352 PIN BGA PINOUT
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Y HSYNC DD[1] DD[12] P[2] AD[15] DA[6] DA[4]
AD[10
]
DA[1] AD[8]
IDEDA[
0]
DTRN TDO BOOT[0] EEDAT ASDO SFRM1 RDLED USBP[1] ABITCLK Y
W P[12] P[9] DD[0] P[5] P[3] DA[7] DA[5]
AD[11
]
AD[9]
IDECS1
N
IDEDA[
1]
TCK TMS EECLK SCLK1 GRLED INT[3] SLA[1] SLA[0] RXD[2] W
V P[16] P[11] P[8] DD[15] DD[13] P[1]
AD[1
4]
AD[12
]
DA[2]
IDECS0
N
IDEDA[
2]
TDI GND ASYNC SSPTX1 INT[2] RTSN USBP[0] CTSN TXD[0] V
U AD[0] P[15] P[10] P[7] P[6] P[4] P[0]
AD[13
]
DA[3] DA[0] DSRN BOOT[1] NC SSPRX1 INT[1]
PWMO
UT
USBM[0] RXD[1] TXD[1] ROW[1] U
T DA[8] BLANK P[13] SPCLK
V_CSY
NC
DD[1
4]
GND
CVD
D
RVDD GND GND RVDD CVDD GND INT[0]
USBM[1
]
RXD[0] TXD[2] ROW[2] ROW[4] T
R AD[2] AD[1] P[17] P[14] RVDD
RVD
D
GND
CVD
D
CVDD GND RVDD RVDD ROW[0] ROW[3]
PLL_GN
D
ROW[5] R
P AD[4] DA[10] DA[9] BRIGHT RVDD
RVD
D
RVDD RVDD XTALI
PLL_VD
D
ROW[6] ROW[7] P
N DA[13] DA[12] DA[11] AD[3] CVDD
CVD
D
GND GND GND GND GND GND GND GND XTALO COL[0] COL[1] COL[2] N
M AD[7] DA[14] AD[6] AD[5] CVDD GND GND GND GND GND GND GND COL[4] COL[3] COL[6] CSN[0] M
L DA[18] DA[17] DA[16] DA[15] GND GND GND GND GND GND GND CVDD COL[5] COL[7] RSTON PRSTN L
K AD[22] DA[20] AD[21] DA[19] RVDD GND GND GND GND GND GND CVDD SYM SYP SXM SXP K
J DA[21]
DQMN[
0]
DQMN[
1]
DQMN[2
]
GND GND GND GND GND GND GND CVDD
RTCXTA
LI
XM YP YM J
H
DQMN[
3]
CASN RASN
SDCSN[
2]
CVDD GND GND GND GND GND GND RVDD
RTCXTA
LO
ADC_V
DD
ADC_G
ND
XP H
G
SDCSN[
0]
SDCSN[
1]
SDWE
N
SDCLK RVDD
RVD
D
RVDD RVDD EGPIO[7]
EGPIO[
9]
EGPIO[1
0]
EGPIO[11
]
G
F
SDCSN[
3]
DA[22] DA[24] AD[25] RVDD GND
CVD
D
CVDD GND GND EGPIO[2]
EGPIO[
4]
EGPIO[6
]
EGPIO[8] F
E AD[23] DA[23] DA[26] CSN[6] GND GND
CVD
D
CVD
D
RVDD GND GND RVDD CVDD CVDD GND ASDI DIOWN
EGPIO[
0]
EGPIO[3
]
EGPIO[5] E
D AD[24] DA[25] DD[11]
SDCLK
EN
AD[19] DD[9] DD[5]
AD[16
]
MIIRXD[
2]
MIITXD[
3]
TXEN
MCWAI
TN
MCDAE
NN
MCADE
NN
EGPIO[
14]
WP USBM[2] ARSTN DIORN EGPIO[1] D
C CSN[1] CSN[3] AD[20] DA[29] DD[10] DD[6] DD[2] MDC
MIIRXD[
3]
TXCLK
MIITXD[
0]
READY MCD2 MCDIR MCELN IORDN MCWRN USBP[2] IORDY DMACKN C
B CSN[2] DA[31] DA[30] DA[27] DD[7] DD[3] WRN MDIO
MIIRXD[
1]
RXERR
MIITXD[
1]
CRS VS1 MCD1
MCBVD
2
MCEHN
EGPIO[1
3]
MCRDN WAITN TRSTN B
A CSN[7] DA[28] AD[18] DD[8] DD[4]
AD[1
7]
RDN
RXCL
K
MIIRXD[
0]
RXDVA
L
MIITXD[
2]
TXERR CLD VS2
MCBVD
1
MCREG
N
EGPIO[1
2]
EGPIO[
15]
IOWRN
MCRESE
TN
A
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