1996 Jun 27 15
Philips Semiconductors Product specification
8-bit microcontroller with on-chip CAN P8xC592
8 I/O PORT STRUCTURE
The P8xC592 has six 8-bit parallel ports: Port 0 to Port 5. In addition to the standard 8-bit parallel ports, the I/O facilities
also include a number of special I/O lines. The use of a Port 1, Port 3 or Port 4 pins as an alternative function is carried
out automatically provided the associated SFR bit is set HIGH.
Table 5 Default Port functions
Table 6 Alternative Port functions
PORT TYPE FUNCTION REMARKS
Port 0 I/O The same as in the 80C51 Except for the additional functions of P1.6 and
P1.7.
Port 1 I/O
Port 2 I/O
Port 3 I/O
Port 4 I/O Parallel l/O port Parallel I/O function is identical to Port1, 2 and 3.
Port 5 I Parallel input port with an input function only May be used as normal inputs if the ADC function
is inoperative.
PORT TYPE FUNCTION REMARKS
Port 0 I/O Multiplexed Low-order address and
Data bus for external memory (AD7 to AD0)
Provides the multiplexed Low-order address and
data bus used for expanding the P8xC592 with
standard memories and peripherals.
Port 1 I/O Capture timer inputs for Timer T2
(CT0I to CT3I), or
External interrupt request inputs
(INT2 to INT5)
External interrupt request inputs, if capture
information is not utilized.
T2 event input (T2) External counter input.
T2 timer reset input (RT2) External counter reset input.
CAN transmitter output 0 (CTX0) CTX0 and CTX1 outputs of the CAN interface
(note 1).
CAN transmitter output 1 (CTX1)
Port 2 I/O High-order address byte for external memory
(A08 to A15)
Port 2 provides the High-order address bus when
the P8xC592 is expanded with external Program
Memory and/or external Data Memory.
Port 3 I/O Serial Input Port (RXD) Receiver input of serial port SIO0 (UART).
Serial Output Port (TXD) Transmitter output of serial port SIO0 (UART).
External interrupt (
INT0) External interrupt request inputs.
External interrupt (
INT1)
Timer 0 external input (T0) Counter inputs.
Timer 1 external input (T1)
External data memory Write strobe (
WR) Control signal to write to external Data Memory.
External data memory Read strobe (
RD) Control signal to read from external Data Memory.
Port 4 I/O Compare and Set/Reset outputs
(CMSR0 to CMSR5)
Can be configured to provide signals indicating a
match between Timer counter T2 and its compare
registers.
Compare and toggle outputs (CMT0, CMT1)
Port 5 I Input channels to ADC (ADC7 to ADC0) Port 5 may be used in conjunction with the ADC
interface (note 2).
