1996 Jun 27 90
Philips Semiconductors Product specification
8-bit microcontroller with on-chip CAN P8xC592
Table 91 External clock drive XTAL1
Table 92 UART Timing in Shift Register Mode
SYMBOL PARAMETER
VARIABLE CLOCK
(f
CLK
= 1.2 to 16 MHz)
UNIT
MIN. MAX.
t
CLK
oscillator clock period (P83C592) 62.5 833.3 ns
t
HIGH
HIGH time 20 t
CLK
− t
LOW
ns
t
LOW
LOW time 20 t
CLK
− t
HIGH
ns
t
r
rise time − 20 ns
t
f
fall time − 20 ns
t
CY
cycle time (12 × t
CLK
) 0.75 10 µs
SYMBOL PARAMETER
f
CLK
UNIT16 MHz 12 MHz VARIABLE CLOCK
MIN. MAX. MIN. MAX. MIN. MAX.
t
XLXL
Serial Port clock cycle timing 0.75 − 1.0 − 12t
CLK
− ms
t
QVXH
output data setup to clock rising edge 492 − 700 − 10t
CLK
− 133 − ns
t
XHQX
output data hold after clock rising edge 8.0 − 50 − 2t
CLK
− 117 − ns
t
XHDX
input data hold after clock rising edge 0 − 0 − 0 − ns
t
XHDV
clock rising edge to input data valid − 492 − 700 − 10t
CLK
− 133 ns
Fig.35 UART waveforms in Shift Register Mode.
ndbook, full pagewidth
VALID VALID VALID VALID VALID VALID VALID VALID
INSTRUCTION
ALE
876543210
CLOCK
WRITE TO SBUF
OUTPUT DATA
CLEAR RI
INPUT DATA
t
XLXL
t
XHQX
t
QVXH
t
XHDV
t
XHDX
SET RI
SET TI
MGA179
