1996 Jun 27 24
Philips Semiconductors Product specification
8-bit microcontroller with on-chip CAN P8xC592
11.2.3 TIMER INTERRUPT FLAG REGISTER (TM2IR)
Table 22 Timer Interrupt Flag register (address C8H)
Table 23 Description of the TM2IR bits (see notes 1 and 2)
Notes
1. Interrupt Enable IEN1 is used to enable/disable Timer 2 interrupts (see Section 14.1.2).
2. Interrupt Priority Register IP1 is used to determine the Timer 2 interrupt priority (see Section 14.1.4).
11.2.4 S
ET ENABLE REGISTER (STE)
Table 24 Set Enable register (address EEH)
Table 25 Description of the STE bits (see notes 1 and 2)
Notes
1. If STE.n is LOW then P4.n is not affected by a match of CM0 and T2 (n = 0, 1, 2, 3, 4, 5).
2. STE.6 and STE.7 are read only.
76543210
T2OV CMI2 CMI1 CMI0 CTI3 CTI2 CTI1 CTI0
BIT SYMBOL FUNCTION
7 T2OV T2: 16-bit overflow interrupt flag
6 CMI2 CM2: interrupt flag
5 CMI1 CM1: interrupt flag
4 CMI0 CM0: interrupt flag
3 CTI3 CT3: interrupt flag
2 CTI2 CT2: interrupt flag
1 CTI1 CT1: interrupt flag
0 CTI0 CT0: interrupt flag
76543210
TG47 TG46 SP45 SP44 SP43 SP42 SP41 SP40
BIT SYMBOL FUNCTION
7 TG47 if HIGH then P4.7 is reset on the next toggle, if LOW P4.7 is set on the next toggle
6 TG46 if HIGH then P4.6 is reset on the next toggle, if LOW P4.6 is set on the next toggle
5 SP45 if HIGH then P4.5 is set on a match of CM0 and T2
4 SP44 if HIGH then P4.4 is set on a match of CM0 and T2
3 SP43 if HIGH then P4.3 is set on a match of CM0 and T2
2 SP42 if HIGH then P4.2 is set on a match of CM0 and T2
1 SP41 if HIGH then P4.1 is set on a match of CM0 and T2
0 SP40 if HIGH then P4.0 is set on a match of CM0 and T2