1996 Jun 27 22
Philips Semiconductors Product specification
8-bit microcontroller with on-chip CAN P8xC592
handbook, full pagewidth
MGA156
STE
R
RTE
I/O port 4
= set
= reset
= toggle
= toggle status
S
R
T
TG
T2 SFR address: TML2 = lower 8 bits
TMH2 = higher 8 bits
INT
COMP
CM0 (S)
INT
COMP
CM1 (R)
INT
COMP
CM2 (T)
CT3I INT
CTI3
CT3
off
f
CLK
T2
RT2
T2ER
external reset
enable
PRESCALER
1/12
T2 COUNTER
8-bit overflow interrupt
16-bit overflow interrupt
CT2I INT
CTI2
CT2
CT1I INT
CTI1
CT1
CT0I INT
CTI0
CT0
R
R
R
R
R
T
T
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
S
S
S
S
S
S
TG
TG
Fig.11 Block diagram of Timer T2 configuration.
1996 Jun 27 23
Philips Semiconductors Product specification
8-bit microcontroller with on-chip CAN P8xC592
11.2.1 COUNTER CONTROL REGISTER (TM2CON)
Table 16 Counter Control register (address EAH)
Table 17 Description of the TM2CON bits
76543210
T2IS1 T2IS0 T2ER T2B0 T2P1 T2P0 T2MS1 T2MS0
BIT SYMBOL FUNCTION
7 T2IS1 Timer 2 16-bit overflow interrupt select.
6 T2IS0 Timer 2 byte overflow interrupt select.
5 T2ER Timer 2 external reset enable.
4 T2B0 Timer 2 byte overflow interrupt flag.
3 T2P1 Timer 2 prescaler select (see Table 18).
2 T2P0
1 T2MS1 Timer 2 mode select (see Table 19).
0 T2MS0
Table 18 Timer 2 prescaler select
T2P1 T2P0 T2 CLOCK
0 0 Clock source
01
1
2
Clock source
10
1
4
Clock source
11
1
8
Clock source
Table 19 Timer 2 mode select
T2MS1 T2MS0 MODE
0 0 Timer T2 is halted
0 1 T2 clock source =
1
12
f
CLK
.
1 0 Test mode; do not use
1 1 T2 clock source = pin T2
11.2.2 CAPTURE CONTROL REGISTER (CTCON)
Table 20 Capture Control register (address EBH)
Table 21 Description of the CTCON bits
76543210
CTN3 CTP3 CTN2 CTP2 CTN1 CTP1 CTN0 CTP0
BIT SYMBOL
FUNCTION
CAPTURE INTERRUPT ON
7 CTN3 CT3I negative edge
6 CTP3 CT3I positive edge
5 CTN2 CT2I negative edge
4 CTP2 CT2I positive edge
3 CTN1 CT1I negative edge
2 CTP1 CT1I positive edge
1 CTN0 CT0I negative edge
0 CTP0 CT0I positive edge
1996 Jun 27 24
Philips Semiconductors Product specification
8-bit microcontroller with on-chip CAN P8xC592
11.2.3 TIMER INTERRUPT FLAG REGISTER (TM2IR)
Table 22 Timer Interrupt Flag register (address C8H)
Table 23 Description of the TM2IR bits (see notes 1 and 2)
Notes
1. Interrupt Enable IEN1 is used to enable/disable Timer 2 interrupts (see Section 14.1.2).
2. Interrupt Priority Register IP1 is used to determine the Timer 2 interrupt priority (see Section 14.1.4).
11.2.4 S
ET ENABLE REGISTER (STE)
Table 24 Set Enable register (address EEH)
Table 25 Description of the STE bits (see notes 1 and 2)
Notes
1. If STE.n is LOW then P4.n is not affected by a match of CM0 and T2 (n = 0, 1, 2, 3, 4, 5).
2. STE.6 and STE.7 are read only.
76543210
T2OV CMI2 CMI1 CMI0 CTI3 CTI2 CTI1 CTI0
BIT SYMBOL FUNCTION
7 T2OV T2: 16-bit overflow interrupt flag
6 CMI2 CM2: interrupt flag
5 CMI1 CM1: interrupt flag
4 CMI0 CM0: interrupt flag
3 CTI3 CT3: interrupt flag
2 CTI2 CT2: interrupt flag
1 CTI1 CT1: interrupt flag
0 CTI0 CT0: interrupt flag
76543210
TG47 TG46 SP45 SP44 SP43 SP42 SP41 SP40
BIT SYMBOL FUNCTION
7 TG47 if HIGH then P4.7 is reset on the next toggle, if LOW P4.7 is set on the next toggle
6 TG46 if HIGH then P4.6 is reset on the next toggle, if LOW P4.6 is set on the next toggle
5 SP45 if HIGH then P4.5 is set on a match of CM0 and T2
4 SP44 if HIGH then P4.4 is set on a match of CM0 and T2
3 SP43 if HIGH then P4.3 is set on a match of CM0 and T2
2 SP42 if HIGH then P4.2 is set on a match of CM0 and T2
1 SP41 if HIGH then P4.1 is set on a match of CM0 and T2
0 SP40 if HIGH then P4.0 is set on a match of CM0 and T2

P80C592FFA/00,512

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT ROMLESS 68PLCC
Lifecycle:
New from this manufacturer.
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