PCF85162 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 17 December 2014 11 of 53
NXP Semiconductors
PCF85162
32 × 4 universal LCD driver for low multiplex rates
The host microcontroller maintains the 2-line I
2
C-bus communication channel with the
PCF85162. The internal oscillator is enabled by connecting pin OSC to pin V
SS
. The
appropriate biasing voltages for the multiplexed LCD waveforms are generated internally.
The only other connections required to complete the system are the power supplies (V
DD
,
V
SS
, and V
LCD
) and the LCD panel chosen for the application.
7.3.1 LCD bias generator
Fractional LCD biasing voltages are obtained from an internal voltage divider consisting of
three impedances connected in series between V
LCD
and V
SS
. The center impedance is
bypassed by switch if the
1
⁄
2
bias voltage level for the 1:2 multiplex drive mode
configuration is selected. The LCD voltage can be temperature compensated externally,
using the supply to pin V
LCD
.
7.3.2 Display register
The display register holds the display data while the corresponding multiplex signals are
generated.
7.3.3 LCD voltage selector
The LCD voltage selector coordinates the multiplexing of the LCD in accordance with the
selected LCD drive configuration. The operation of the voltage selector is controlled by the
mode-set command from the command decoder. The biasing configurations that apply to
the preferred modes of operation, together with the biasing characteristics as functions of
V
LCD
and the resulting discrimination ratios (D) are given in Table 14.
Discrimination is a term which is defined as the ratio of the on and off RMS voltage across
a segment. It can be thought of as a measurement of contrast.
The resistance of the power lines must be kept to a minimum.
Fig 4. Typical system configuration
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