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PCF85162T/1,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P53
PCF85162 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 17 December 2014 31 of 53
NXP Semiconductors
PCF85162
32 × 4 universal LCD driver for low multiplex rates
10. Safety notes
11. Limiting values
[1] Pass level; Human Body Model (HBM), according to Ref. 6 “JESD22-A114”.
[2] Pass level; Charged-Device Model (CDM), according to Ref. 7 “
JESD22-C101”.
[3] Pass level; latch-up testing according to Ref. 8 “
JESD78” at maximum ambient temperature (T
amb(max)
).
[4] According to the store and transport requirements (see Ref. 12 “
UM10569”) the devices have to be stored at a temperature of +8 C to
+45 C and a humidity of 25 % to 75 %.
CAUTION
This device is sensitive to ElectroStatic Discharge (ESD). Observe precautions for handling
electrostatic sensitive devices.
Such precautions are described in the ANSI/ESD S20.20, IEC/ST 61340-5, JESD625-A or
equivalent standards.
CAUTION
Static voltages across the liquid crystal display can build up when the LCD supply voltage
(V
LCD
) is on while the IC supply voltage (V
DD
) is off, or vice versa. This may cause unwanted
display artifacts. To avoid such artifacts, V
LCD
and V
DD
must be applied or removed together.
Table 18. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DD
supply voltage 0.5 +6.5 V
V
LCD
LCD supply voltage 0.5 +7.5 V
V
I
input voltage on each of the pins CLK, SDA,
SCL, SYNC, SA0, OSC, A0 to A2
0.5 +6.5 V
V
O
output voltage on each of the pins S0 to S31,
BP0 to BP3
0.5 +7.5 V
I
I
input current 10 +10 mA
I
O
output current 10 +10 mA
I
DD
supply current 50 +50 mA
I
DD(LCD)
LCD supply current 50 +50 mA
I
SS
ground supply current 50 +50 mA
P
tot
total power dissipation - 400 mW
P
o
output power - 100 mW
V
ESD
electrostatic
discharge voltage
HBM
[1]
- 3500 V
CDM
[2]
- 1750 V
I
lu
latch-up current
[3]
-100mA
T
stg
storage temperature
[4]
65 +150 C
T
amb
ambient temperature operating device 40 +85 C
PCF85162 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 17 December 2014 32 of 53
NXP Semiconductors
PCF85162
32 × 4 universal LCD driver for low multiplex rates
12. Static characteristics
Table 19. Static characteristics
V
DD
= 1.8 V to 5.5 V; V
SS
= 0 V; V
LCD
= 2.5 V to 6.5 V; T
amb
=
40
C to +85
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Supplies
V
DD
supply voltage 1.8 - 5.5 V
V
LCD
LCD supply voltage
[1]
2.5- 6.5V
I
DD
supply current f
clk(ext)
= 1536 Hz
[2][3]
-3.57A
V
DD
=3.0V; T
amb
=25C-2.7-A
I
DD(LCD)
LCD supply current f
clk(ext)
= 1536 Hz
[2]
-2332A
V
LCD
=3.0V; T
amb
=25C-13-A
Logic
[4]
V
P(POR)
power-on reset supply
voltage
1.01.31.6V
V
IL
LOW-level input
voltage
on pins CLK, SYNC, OSC, A0 to
A2, SA0, SCL, SDA
V
SS
-0.3V
DD
V
V
IH
HIGH-level input
voltage
on pins CLK, SYNC, OSC, A0 to
A2, SA0, SCL, SDA
[5][6]
0.7V
DD
-V
DD
V
I
OL
LOW-level output
current
output sink current;
V
OL
=0.4V; V
DD
=5V
on pins CLK and SYNC
1- - mA
on pin SDA 3 - - mA
I
OH(CLK)
HIGH-level output
current on pin CLK
output source current;
V
OH
=4.6V; V
DD
=5V
1- - mA
I
L
leakage current V
I
=V
DD
or V
SS
;
on pins CLK, SCL, SDA, A0 to
A2, and SA0
1- +1A
I
L(OSC)
leakage current on pin
OSC
V
I
=V
DD
1- +1A
C
I
input capacitance
[7]
--7pF
PCF85162 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 5 — 17 December 2014 33 of 53
NXP Semiconductors
PCF85162
32 × 4 universal LCD driver for low multiplex rates
[1] V
LCD
> 3 V for
1
⁄
3
bias.
[2] LCD outputs are open-circuit; inputs at V
SS
or V
DD
; external clock with 50 % duty factor; I
2
C-bus inactive.
[3] For typical values, see Figure 23
.
[4] The I
2
C-bus interface of PCF85162 is 5 V tolerant.
[5] When tested, I
2
C pins SCL and SDA have no diode to V
DD
and may be driven to the V
I
limiting values given in Table 18 (see Figure 22
as well).
[6] Propagation delay of driver between clock (CLK) and LCD driving signals.
[7] Periodically sampled, not 100 % tested.
[8] Outputs measured one at a time.
LCD outputs
V
O
output voltage
variation
on pins BP0 to BP3 and
S0 to S31
100 - +100 mV
R
O
output resistance V
LCD
= 5 V
[8]
on pins BP0 to BP3 - 1.5 - k
on pins S0 to S31 - 6.0 - k
Table 19. Static characteristics …continued
V
DD
= 1.8 V to 5.5 V; V
SS
= 0 V; V
LCD
= 2.5 V to 6.5 V; T
amb
=
40
C to +85
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
T
amb
=30C; 1:4 multiplex drive mode; V
LCD
= 6.5 V; f
clk(ext)
= 1.536 kHz; all RAM written with
logic 1; no display connected; I
2
C-bus inactive.
Fig 23. Typical I
DD
with respect to V
DD
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P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P53

PCF85162T/1,118

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Buy PCF85162T/1,118
Manufacturer:
NXP Semiconductors
Description:
LCD Drivers I2C - LCD Driver
Lifecycle:
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