ADV212
Rev. B | Page 2 of 44
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
JPEG2000 Feature Support .............................................................. 3
Functional Block Diagram .............................................................. 3
Specifications ..................................................................................... 4
Supply Voltages and Current ...................................................... 4
Input/Output Specifications ........................................................ 4
Clock and
RESET
Specifications ................................................ 5
Normal Host Mode—Write Operation ..................................... 6
Normal Host Mode—Read Operation ...................................... 7
DREQ
/
DACK
DMA Mode—Single FIFO Write Operation .. 8
DREQ
/
DACK
DMA Mode—Single FIFO Read Operation . 10
External DMA Mode—FIFO Write, Burst Mode .................. 12
External DMA Mode—FIFO Read, Burst Mode ................... 13
Streaming Mode (JDATA)—FIFO Read/Write ...................... 14
VDATA Mode Timing ............................................................... 15
Raw Pixel Mode Timing ............................................................ 17
JTAG Timing ............................................................................... 18
Absolute Maximum Ratings .......................................................... 19
Thermal Resistance .................................................................... 19
ESD Caution ................................................................................ 19
Pin Configurations and Function Descriptions ......................... 20
Theory of Operation ...................................................................... 25
Wavelet Engine ........................................................................... 25
Entropy CODECs ....................................................................... 25
Embedded Processor System .................................................... 25
Memory System .......................................................................... 25
Internal DMA Engine ................................................................ 25
ADV212 Interfaces ......................................................................... 26
Video Interface (VDATA Bus) .................................................. 26
Host Interface (HDATA Bus) ................................................... 26
Direct and Indirect Registers .................................................... 26
Control Access Registers ........................................................... 27
Pin Configuration and Bus Sizes/Modes ................................ 27
Stage Register .............................................................................. 27
JDATA Mode ............................................................................... 27
External DMA Engine ............................................................... 27
Internal Registers ............................................................................ 28
Direct Registers ........................................................................... 28
Indirect Registers ........................................................................ 29
PLL Registers .............................................................................. 30
Hardware Boot Modes and Power Considerations ............... 31
Video Input Formats ...................................................................... 32
Applications Information .............................................................. 34
Encode—Multichip Mode ......................................................... 34
Decode—Multichip Master/Slave ............................................ 35
Digital Still Camera/Camcorder .............................................. 36
Encode/Decode SDTV Video Application ............................. 37
32-Bit Host Application ............................................................. 38
HIPI (Host Interface—Pixel Interface) ................................... 39
JDATA Interface ......................................................................... 40
Outline Dimensions ....................................................................... 41
Ordering Guide .......................................................................... 42
REVISION HISTORY
4/10—Rev. A to Rev. B
Added Wavescale Information .................................... Throughout
Changes to Features Section............................................................ 1
Changes to Table 16 ........................................................................ 20
Changes to Video Interface (VDATA Bus) Section, Changes to
Table 17 ............................................................................................ 26
Changes to Hardware Boot Modes Section ................................ 31
Changes to Encode—Multichip Mode Section .......................... 34
4/08—Rev. 0 to Rev. A
Change to Table 1, Static Current Parameter ................................. 4
10/06—Revision 0: Initial Version
