AMIS−30422
http://onsemi.com
3
Table 1. PIN LIST AND DESCRIPTION
Name Pin Description Type
Equivalent
Schematic
MOTXP 2 Positive end of phase X−coil Analog I/O
GXTL 3 Gate of external NMOS FET of the X bridge top left side Analog Output
GXBR 4 Gate of external NMOS FET of the X bridge bottom right side Analog Output
MOTXN 5 Negative end of phase X−coil Analog I/O
GXTR 6 Gate of external NMOS FET of the X bridge top right side Analog Output
RSENSXP 7 Resistor sense of the X bridge positive pin Analog Input
RSENSXN 8 Resistor sense of the X bridge negative pin Analog Input
REF 9 Maximum Coil Current Setting Analog Input Type 7
VDD 11 Low voltage supply output (needs external decoupling capacitor) Supply Type 8
GND 12 Ground, heat sink Supply
VREGH 13 High voltage supply output Analog output
SLA 14 Speed and Load Angle output Analog output Type 6
ERRb 15 Error output Digital Output Type 2 or 4
CLR 16 Clear input Digital Input Type 5
WDb 17 Watchdog and Power On Reset output Digital Output Type 2 or 4
HOLDCUR 18 Hold Current Input Digital Input
CLK 21 SPI Clock input Digital Input Type 1
CSb 22 SPI Chip Select input Digital Input Type 3
DI 23 SPI Data input Digital Input Type 1
DO 24 SPI Data output Digital Output Type 4
TEST 25 Test input. To be tied to ground. Digital Input Type 1
NXT 26 Next Microstep input Digital Input Type 1
DIR 27 Direction input Digital Input Type 1
RSENSYN 29 Resistor sense of the Y bridge negative pin Analog Input
RSENSYP 30 Resistor sense of the Y bridge positive pin Analog Input
GYTR 31 Gate of external NMOS FET of the Y bridge top right side Analog Output
MOTYN 32 Negative end of phase Y−coil Analog I/O
GYBR 33 Gate of external NMOS FET of the Y bridge bottom right side Analog Output
GYTL 34 Gate of external NMOS FET of the Y bridge top left side Analog Output
MOTYP 35 Positive end of phase Y−coil Analog I/O
GYBL 36 Gate of external NMOS FET of the Y bridge bottom left side Analog Output
GND 40 Ground, heat sink Supply
VBB 41 High voltage supply input Supply Type 9
CPN 42 Negative connection of charge pump capacitor Analog I/O
CPP 43 Positive connection of charge pump capacitor Analog I/O
VCP 44 Charge Pump filter capacitor Analog I/O
GND 45 Ground, heat sink Supply
GXBL 48 Gate of external NMOS FET of the X bridge bottom left side Analog Output
NC
1, 10, 19,
20, 28,
37, 38,
39, 46,
47
Not connected or connect with ground
NOTE: Output type of WDb− and ERRb−pin is selectable through SPI.
