LTC4417
4
4417f
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified.
Note 3: Each V1 to V3 supply current specification includes current into
the corresponding VS1 to VS3 for the channel(s) being tested.
Note 4: Specification represents the total diode-ORed current of V1 to V3
input supplies, selecting the highest voltage as the input source. If two
input supplies are similar in voltage and higher than the remaining input
supply voltage, the current is split evenly between the two higher voltage
supplies. Current is split evenly if all supplies are equal.
Note 5: Falling edge of G1 to G3 measured from 11V to 8V.
Note 6: Rising edge of G1 to G3 measured from 7V to 11V.
Note 7: UV1 driven below V
OV,UV(THR)
. Time is measured from respective
rising edge G1 to G3 crossing (VS1 to VS3) – 3V to next valid priority
falling edge G1 to G3 crossing (VS1 to VS3) – 3V.
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. For all tests, V1 = VS1, V2 = VS2, V3 = VS3. Unless otherwise noted,
V1 = V2 = V3 = V
OUT
= 12V, HYS = GND.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Input/Output Pins
V
VALID(OL)
VALID1 to VALID3 Output Low Voltage I = 1mA, (V1 to V3) = 2.5V, V
OUT
= 0V
l
0.25 0.55 V
t
pVALID(OFF)
VALID1 to VALID3 Delay OFF From OV/UV Fault
l
5 8 13 µs
V
CAS(OH)
CAS Output High Voltage I = –1µA
l
1.4 2 3 V
V
CAS(OL)
CAS Output Low Voltage I = 1mA
l
0.2 0.4 V
I
CAS
CAS Pull-Up Current SHDN = 0V, CAS = 1V
l
–6 –20 –40 µA
t
pCAS(EN)
CAS Delay from V
G(OFF)
V
OUT
= 11V
l
0.4 0.7 1.3 µs
V
EN(THR)
EN Threshold Voltage EN Rising
l
0.6 1 1.4 V
V
SHDN(THR)
SHDN Threshold Voltage SHDN Rising
l
0.4 0.8 1.2 V
V
SHDN_EN(HYS)
SHDN, EN Threshold Hysteresis 100 mV
I
SHDN_EN
SHDN, EN Pull-Up Current SHDN = EN = 0V
l
–0.5 –2 –5 µA
I
LEAK
SHDN, EN, VALID1 to VALID3, CAS Leakage
Current
SHDN = EN = (VALID1 to VALID3) = 36V,
CAS = 5.5V
l
±1 µA
OV, UV Protection Circuitry
V
OV_UV(THR)
OV1 to OV3, UV1 to UV3 Comparator Threshold V
OUT
= 11V, OV1 to OV3 Rising, UV1 to UV3
Falling
l
0.985 1 1.015 V
V
OV_UV(HYS)
OV1 to OV3, UV1 to UV3 Comparator
Hysteresis
V
OUT
= 11V
l
15 30 45 mV
I
UV_OV(LEAK)
OV1 to OV3, UV1 to UV3 Leakage Current OV1 to OV3 = 1.015V, UV1 to UV3 = 0.985V
l
±20 nA
I
OV_UV(MIN)
Minimum External Hysteresis Current I
HYS
= –400nA
l
35 50 75 nA
I
OV_UV(MAX)
Maximum External Hysteresis Current I
HYS
= –4µA
l
420 520 620 nA
V
HYS
HYS Voltage I
HYS
= –4µA
l
470 495 520 mV
t
VALID
V1 to V3 Validation Time 100 256 412 ms
LTC4417
5
4417f
Typical perForMance characTerisTics
ΔV
G
vs Temperature
Gate Falling Slew Rate
vs Temperature
Gate Rising Slew Rate
vs Temperature
I
G(DN)
vs Temperature Switchover Time vs Temperature
Valid Delay Off Time
vs Temperature
Total Shutdown Supply Current
vs Supply Voltage
Total Enabled Supply Current
vs Supply Voltage I
V1-V3,VOUT(EN)
vs Supply Voltage
SUPPLY VOLTAGE (V)
0
TOTAL ENABLE SUPPLY CURRENT (µA)
40
35
25
30
20
10
15
5
0
10 20 30
4417 G02
40
ALL SUPPLY, VS AND V
OUT
PINS CONNECTED TOGETHER
SUPPLY VOLTAGE (V)
0
TOTAL SHUTDOWN SUPPLY CURRENT (µA)
25
20
10
15
5
0
10 20 30
4417 G01
40
ALL SUPPLY AND VS PINS CONNECTED
TOGETHER, V
OUT
= 0V
TEMPERATURE (°C)
–50
∆V
G
(V)
6.40
6.35
6.25
6.30
6.20
6.10
6.15
6.05
6.00
0 50–25 25 100
4417 G04
12575
TEMPERATURE (°C)
–50
I
G(DN)
(µA)
3.0
2.5
1.5
2.0
1.0
0.5
0
0 50–25 25 100
4417 G07
12575
TEMPERATURE (°C)
–50
t
G(SWITCHOVER)
(µs)
3.0
2.5
1.5
2.0
1.0
0.5
0
0 50–25 25 100
4417 G08
12575
TEMPERATURE (°C)
–50
VALID DELAY TIME (µs)
8.4
8.2
8.3
8.1
7.9
8.0
7.8
7.7
0 50–25 25 100
4417 G09
12575
TEMPERATURE (°C)
–50
GATE FALLING SLEW RATE (V/µs)
16
14
10
12
8
4
6
2
0
0 50–25 25 100
4417 G05
12575
V1 = 2.7V
V1 = 5V
V1 = 12V
V1 = 36V
C
GATE
= 10nF
V1 = V2 = V3
V1 = 24V
TEMPERATURE (°C)
–50
GATE RISING SLEW RATE (V/µs)
16
12
4
8
0
0 50–25 25 100
4417 G06
12575
V1 = 2.7V
V1 = 5V
V1 = 12V, 24V, 36V
V1 = V2 = V3
C
GATE
= 10nF
V2 = VS2 VOLTAGE (V)
0
I
V1-V3,VOUT(EN)
(µA)
16
14
10
12
8
4
6
2
0
10 20 30
4417 G03
40
V1 = VS1 = 5V
V2 = VS2
V3 = VS3 = 2.8V
V
OUT
= 4.9V
LTC4417
6
4417f
Typical perForMance characTerisTics
V
OUT
Switching from Higher to
Lower Voltage
V
OUT
Switching from Lower to
Higher Voltage with Slew Rate
Control Circuitry Reverse Voltage Blocking
V
VALID(OL)
vs Pull-Up Current V
OV,UV
vs Temperature Deglitched Connection
pin FuncTions
CAS: Cascade Output. Digital output used for cascad-
ing multiple LTC4417s. Connect CAS to EN of another
LTC4417 to increase the number of multiplexed input
supplies. CAS is pulled up to the internal V
LDO
voltage
by an internal 20µA current source to indicate when all
inputs are invalid, the external P-channel MOSFETs are
determined to be off, and EN is above 1V. CAS also pulls
high when SHDN is driven below 1V. CAS is pulled low
when any input supply is within the OV/UV window for at
least 256ms and both SHDN and EN are above 1V. CAS
also pulls low when EN is driven below 1V. CAS can be
driven to 5.5V independent of the input supply voltages.
Leave open if not used.
EN: Channel Enable Input. EN is a high voltage input that
allows the user to quickly connect and disconnect chan-
nels without resetting the OV/UV timers. When below 1V,
all external back-to-back P-channel MOSFETs are driven
off by pulling G1, G2 and G3 to their respective VS1, VS2
and VS3. When above 1V, the highest valid priority chan-
nel is connected to the output. EN is
pulled to the internal
V
LDO
voltage with aA current source and can be pulled
up externally to a maximum voltage of 36V. Leave open
when not used.
Exposed Pad (UF Package Only): Exposed pad may be
left open or connected to device ground.
PULL-UP CURRENT (mA)
0
V
VALID(OL)
(V)
0.5
0.4
0.2
0.3
0.1
0
0.5 1.0 1.5
4417 G10
2.0
TEMPERATURE (°C)
–50
V
OV,UV
(V)
1.04
1.03
1.01
1.02
1.00
0.98
0.99
0.97
0.96
0 50–25 25 100
4417 G11
12575
V
UV(RISING)
V
OV(FALLING)
V
OV,UV(THR)
V2
V1
C
L
= 122µF
I
L
= 1A
–40V PCH FDD4685
100ms/DIV
4417 G12
2V/DIV
V
OUT
V1 = –20V
V1 = 20V
C
L
= 122µF
I
L
= 1A
–40V PCH FDD4685
5µs/DIV
4417 G15
V2, V
OUT
10V/DIV
V2
V1
C
L
= 122µF
I
L
= 1A
–40V PCH FDD4685
100µs/DIV
4417 G13
2V/DIV
V
OUT
V2
2V/DIV
V1
2V/DIV
I
VOUT
5A/DIV
R
S
= 1.43kΩ
C
S
= 6.8nF
C
L
= 100µF
I
L
= 1A
–40V PCH FDD4685
20µs/DIV
4417 G14
V
OUT

LTC4417HUF#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Power Management Specialized - PMIC 2.5V to 36V Prioritized Triple PowerPath Controller
Lifecycle:
New from this manufacturer.
Delivery:
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