Lattice Semiconductor LA-ispMACH 4000V/Z Automotive Family Data Sheet
28
LA-ispMACH 4000V/Z Power Supply and NC Connections
1
Signal 44 TQFP
2
48 TQFP
2
100 TQFP
2
128 TQFP
2
144 TQFP
2
VCC 11, 33 12, 36 25, 40, 75, 90 32, 51, 96, 115 36, 57, 108, 129
VCCO0
VCCO (Bank 0)
6 6 13, 33, 95 3, 17, 30, 41, 122
3, 19, 34, 47, 136
VCCO1
VCCO (Bank 1)
28 30 45, 63, 83 58, 67, 81, 94, 105
64, 75, 91, 106, 119
GND 12, 34 13, 37 1, 26, 51, 76 1, 33, 65, 97 1, 37, 73, 109
GND (Bank 0)
5 5 7, 18, 32, 96 10, 24, 40, 113, 123
10, 18
6
, 27, 46, 127,
137
GND (Bank 1)
27 29 46, 57, 68, 82 49, 59, 74, 88, 104
55, 65, 82, 90
6
, 99,
118
NC None None None None 17, 20, 38, 45, 72,
89, 92, 110, 117,
144
1. All grounds must be electrically connected at the board level. However, for the purposes of I/O current loading, grounds are associated with
the bank shown.
2. Pin orientation follows the conventional order from pin 1 marking of the top side view and counter-clockwise.
