LTC2655
6
2655f
ELECTRICAL CHARACTERISTICS
The l denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T
A
= 25°C. V
CC
= 2.7V to 5.5V, V
OUT
unloaded unless otherwise specifi ed.
LTC2655B-L16/LTC2655-L12 (Internal Reference = 1.25V)
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Reference
Reference Output Voltage 1.248 1.25 1.252 V
Reference Temperature Coeffi cient (Note 7) ±2 ±10 ppm/°C
Reference Line Regulation V
CC
±10% –80 dB
Reference Short-Circuit Current V
CC
= 5.5V, Forcing REFIN/OUT to GND
l
35 mA
REFCOMP Pin Short-Circuit Current V
CC
= 5.5V, Forcing REFCOMP to GND
l
65 200 µA
Reference Load Regulation V
CC
= 3V±10% or 5V±10%, I
OUT
= 100µA Sourcing 40 mV/mA
Reference Output Voltage Noise Density C
REFCOMP
= C
REFIN/OUT
= 0.1µF, at f = 1kHz 30 nV/√Hz
Reference Input Range External Reference Mode (Note 14)
l
0.5 V
CC
/2 V
Reference Input Current
l
0.001 1 µA
Reference Input Capacitance (Note 9) 20 pF
Power Supply
V
CC
Positive Supply Voltage For Specifi ed Performance
l
2.7 5.5 V
I
CC
Supply Current (Note 8) V
CC
= 5V, Internal Reference On
V
CC
= 5V, Internal Reference Off
V
CC
= 3V, Internal Reference On
V
CC
= 3V, Internal Reference Off
l
l
l
l
1.7
1.3
1.6
1.2
2.5
2
2.2
1.7
mA
mA
mA
mA
I
SD
Supply Current in Shutdown Mode (Note 8) V
CC
= 5V
l
3µA
Digital I/O
V
IL
Low Level Input Voltage (SDA and SCL)
l
0.3V
CC
V
V
IH
High Level Input Voltage (SDA and SCL)
l
0.7V
CC
V
V
IL(LDAC)
Low Level Input Voltage (LDAC) V
CC
= 4.5V to 5.5V
l
0.8 V
V
CC
= 2.7V to 4.5V
l
0.6 V
V
IH(LDAC)
High Level Input Voltage (LDAC) V
CC
= 3.6V to 5.5V
l
2.4 V
V
CC
= 2.7V to 3.6V
l
2V
V
IL(CA)
Low Level Input Voltage (CA0 to CA2) See Test Circuit 1
l
0.15V
CC
V
V
IH(CA)
High Level Input Voltage (CA0 to CA2) See Test Circuit 1
l
0.85V
CC
V
R
INH
Resistance from CA
n
(
n
= 0,1,2)
to V
CC
to Set CA
n
= V
CC
See Test Circuit 2
l
10 k
R
INL
Resistance from CAn (
n
= 0,1,2)
to GND to Set CA
n
= GND
See Test Circuit 2
l
10 k
R
INF
Resistance from CA
n
(
n
= 0,1,2)
to V
CC
or GND to Set Ca
n
= FLOAT
See Test Circuit 2
l
2M
V
OL
Low Level Output Voltage Sink Current =3mA
l
0 0.4 V
t
OF
Output Fall Time V
O
= V
IH(MIN)
to V
O
= V
IL(MAX)
,
C
B
= 10pF to 400pF (Note 13)
20+0.1C
B
250 ns
t
SP
Pulse Width of Spikes Suppressed by Input
Filter
l
050ns
I
IN
Input Leakage 0.1V
CC
≤ V
IN
≤ 0.9V
CC
l
1µA
C
IN
I/O Pin Capacitance (Note 9)
l
10 pF
C
B
Capacitance Load for Each Bus Line
l
400 pF
C
CA
n
External Capacitive Load on Address Pins
CA0, CA1 and CA2
l
10 pF
