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NCP1608BDR2G

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NCP1608
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10
Introduction
The NCP1608 is a voltage mode, power factor correction
(PFC) controller designed to drive cost−effective
pre-converters to comply with line current harmonic
regulations. This controller operates in critical conduction
mode (CrM) suitable for applications up to 350 W. Its
voltage mode scheme enables it to obtain near unity power
factor without the need for a line-sensing network. A high
precision transconductance error amplifier regulates the
output voltage. The controller implements comprehensive
safety features for robust designs.
The key features of the NCP1608 are:
• Constant On Time (Voltage Mode) CrM Operation.
A high power factor is achieved without the need for
input voltage sensing. This enables low standby power
consumption.
• Accurate and Programmable On Time Limitation. The
NCP1608 uses an accurate current source and an
external capacitor to generate the on time.
• Wide Control Range. In high power applications
(> 150 W), inadvertent skipping can occur at high
input voltage and high output power if noise immunity
is not provided. The noise immunity provided by the
NCP1608 prevents inadvertent skipping.
• High Precision Voltage Reference. The error amplifier
reference voltage is guaranteed at 2.5 V ±1.6% over
process and temperature. This results in accurate
output voltages.
• Low Startup Current Consumption. The current
consumption is reduced to a minimum (< 35 mA)
during startup, enabling fast, low loss charging of
V
CC
. The NCP1608 includes undervoltage lockout and
provides sufficient V
CC
hysteresis during startup to
reduce the value of the V
CC
capacitor.
• Powerful Output Driver. A Source 500 mA/Sink
800 mA totem pole gate driver enables rapid turn on
and turn off times. This enables improved efficiencies
and the ability to drive higher power MOSFETs.
A combination of active and passive circuits ensures
that the driver output voltage does not float high if
V
CC
does not exceed V
CC(on)
.
• Accurate Fixed Overvoltage Protection (OVP). The
OVP feature protects the PFC stage against excessive
output overshoots that may damage the system.
Overshoots typically occur during startup or transient
loads.
• Undervoltage Protection (UVP). The UVP feature
protects the system if there is a disconnection in the
power path to C
bulk
(i.e. C
bulk
is unable to charge).
• Protection Against Open Feedback Loop. The OVP
and UVP features protect against the disconnection of
the output divider network to the FB pin. An internal
resistor (R
FB
) protects the system when the FB pin is
floating (Floating Pin Protection, FPP).
• Overcurrent Protection (OCP). The inductor peak
current is accurately limited on a cycle-by-cycle basis.
The maximum inductor peak current is adjustable by
modifying the current sense resistor. An integrated
LEB filter reduces the probability of noise
inadvertently triggering the overcurrent limit.
• Shutdown Feature. The PFC pre-converter is shutdown
by forcing the FB pin voltage to less than V
UVP
. In
shutdown mode, the I
CC
current consumption is
reduced and the error amplifier is disabled.
Application Information
Most electronic ballasts and switching power supplies
use a diode bridge rectifier and a bulk storage capacitor to
produce a dc voltage from the utility ac line (Figure 24).
This DC voltage is then processed by additional circuitry
to drive the desired output.
Figure 24. Typical Circuit without PFC
Load
ConverterRectifiers
Bulk
Storage
Capacitor
+
AC
Line
This rectifying circuit consumes current from the line
when the instantaneous ac voltage exceeds the capacitor
voltage. This occurs near the line voltage peak and the
resulting current is non-sinusoidal with a large harmonic
content. This results in a reduced power factor (typically
< 0.6). Consequently, the apparent input power is higher
than the real power delivered to the load. If multiple
devices are connected to the same input line, the effect
increases and a “line sag” is produced (Figure 25).
Figure 25. Typical Line Waveforms without PFC
Line
Sag
Rectified DC
AC Line Voltage
AC Line Current
0
0
V
peak
Government regulations and utilities require reduced
line current harmonic content. Power factor correction is
implemented with either a passive or an active circuit to
comply with regulations. Passive circuits contain a
combination of large capacitors, inductors, and rectifiers
that operate at the ac line frequency. Active circuits use a
NCP1608
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11
high frequency switching converter to regulate the input
current harmonics. Active circuits operate at a higher
frequency, which enables them to be physically smaller,
weigh less, and operate more efficiently than a passive
circuit. With proper control of an active PFC stage, almost
any complex load emulates a linear resistance, which
significantly reduces the harmonic current content. Active
PFC circuits are the most popular way to meet harmonic
content requirements because of the aforementioned
benefits. Generally, active PFC circuits consist of inserting
a PFC pre−converter between the rectifier bridge and the
bulk capacitor (Figure 26).
Figure 26. Active PFC Pre−Converter with the NCP1608
Rectifiers
+
AC Line
High
Frequency
Bypass
Capacitor
NCP1608
PFC Pre−Converter
Converter
Load
+
Bulk
Storage
Capacitor
The boost (or step up) converter is the most popular
topology for active power factor correction. With the
proper control, it produces a constant voltage while
consuming a sinusoidal current from the line. For medium
power (< 350 W) applications, CrM is the preferred control
method. CrM occurs at the boundary between
discontinuous conduction mode (DCM) and continuous
conduction mode (CCM). In CrM, the driver on time begins
when the boost inductor current reaches zero. CrM
operation is an ideal choice for medium power PFC boost
stages because it combines the reduced peak currents of
CCM operation with the zero current switching of DCM
operation. The operation and waveforms in a PFC boost
converter are illustrated in Figure 27.
Figure 27. Schematic and Waveforms of an Ideal CrM Boost Converter
Diode Bridge
AC Line
+
−
L
Diode Bridge
AC Line
+
−
L
+
The power switch is ON The power switch is OFF
Critical Conduction Mode:
Next current cycle starts
when the core is reset.
Inductor
Current
+
With the power switch voltage being about zero, the
input voltage is applied across the inductor. The inductor
current linearly increases with a (V
in
/L) slope.
The inductor current flows through the diode. The inductor volt-
age is (V
out
− V
in
) and the inductor current linearly decays with a
(V
out
− V
in
)/L slope.
V
out
(V
out
− V
in
)/L
I
L(peak)
I
L
V
in
V
drain
V
drain
V
in
/L
V
out
V
in
If next cycle does not start
then V
drain
rings towards V
in
+
I
L
V
in
V
drain
NCP1608
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12
When the switch is closed, the inductor current increases
linearly to the peak value. When the switch opens, the
inductor current linearly decreases to zero. When the
inductor current decreases to zero, the drain voltage of the
switch (V
drain
) is floating and begins to decrease. If the next
switching cycle does not begin, then V
drain
rings towards
V
in
. A derivation of equations found in AND8123 leads to
the result that high power factor in CrM operation is
achieved when the on time (t
on
) of the switch is constant
during an ac cycle and is calculated using Equation 1.
t
on
+
2 @ P
out
@ L
h @ Vac
2
(eq. 1)
Where P
out
is the output power, L is the inductor value, h
is the efficiency, and Vac is the rms input voltage.
A description of the switching over an ac line cycle is
illustrated in Figure 28. The on time is constant, but the off
time varies and is dependent on the instantaneous line
voltage. The constant on time causes the peak inductor
current (I
L(peak)
) to scale with the ac line voltage. The
NCP1608 represents an ideal method to implement a
constant on time CrM control in a cost−effective and robust
solution by incorporating an accurate regulation circuit, a
low current consumption startup circuit, and advanced
protection features.
Figure 28. Inductor Waveform During CrM Operation
ON
OFF
MOSFET
I
in
(t)
I
L
(t)
V
in
(t)
V
in(peak)
I
L(peak)
I
in(peak)
Error Amplifier Regulation
The NCP1608 regulates the boost output voltage using
an internal error amplifier (EA). The negative terminal of
the EA is pinned out to FB, the positive terminal is
connected to a 2.5 V ± 1.6% reference (V
REF
), and the EA
output is pinned out to Control (Figure 29).
A feature of using a transconductance error amplifier is
that the FB pin voltage is only determined by the resistor
divider network connected to the output voltage, not the
operation of the amplifier. This enables the FB pin to be
used for sensing overvoltage or undervoltage conditions
independently of the error amplifier.
Figure 29. Error Amplifier and On Time Regulation Circuits
FB
Control
EA
+
PWM BLOCK
gm
UVP
+
OVP
+
OVP Fault
(Enable EA)
UVP Fault
C
COMP
V
Control
V
REF
V
out
R
out1
R
out2
R
FB
t
on
t
on(MAX)
+
−
+
−
+
−
V
OVP
V
UVP
POK
V
Control
V
EAH
Ct
(offset)
t
PWM
Slope +
Ct
I
charge
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NCP1608BDR2G

Mfr. #:
Buy NCP1608BDR2G
Manufacturer:
ON Semiconductor
Description:
Power Factor Correction - PFC COST EFFECT PWR FACT CONT
Lifecycle:
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