NCP1608
www.onsemi.com
16
During the delay caused by R
ZCD
and the ZCD pin capacitance, the equivalent drain capacitance (C
EQ(drain)
) discharges
through the path shown in Figure 35.
Figure 35. Equivalent Drain Capacitance Discharge Path
+
AC Line
EMI
Filter
+
D
L
I
in
C
in
I
L
C
bulk
V
out
C
EQ(drain)
C
EQ(drain)
is the combined parasitic capacitances of the
MOSFET, the diode, and the inductor. C
in
is charged by the
energy discharged by C
EQ(drain)
. The charging of C
in
reverse biases the bridge rectifier and causes the input
current (I
in
) to decrease to zero. The zero input current
causes THD to increase. To reduce THD, the ratio (t
z
/ T
SW
)
is minimized, where t
Z
is the period from when I
L
= 0 A to
when the drive turns on. The ratio (t
z
/ T
SW
) is inversely
proportional to the square root of L.
During startup, there is no energy in the ZCD winding
and no voltage signal to activate the ZCD comparators.
This means that the drive never turns on. To enable the PFC
stage to start under these conditions, an internal watchdog
timer (t
start
) is integrated into the controller. This timer
turns the drive on if the drive has been off for more than
165 ms (typical value). This feature is deactivated during a
fault mode (OVP or UVP), and reactivated when the fault
is removed.
Wide Control Range
The Ct charging threshold (V
Ct(off)
) decreases as the
output power is decreased from the maximum output
power to the minimum output power in the application. In
high power applications (> 150 W), V
Control
is reduced to
a low voltage at a large output power and Ct
(offset)
remains
constant. The result is that V
Ct(off)
is reduced to a low
voltage at a large output power. The low V
Control
and
V
Ct(off)
voltages are susceptible to noise. The large output
power combined with the low V
Control
and V
Ct(off)
increase
the probability of noise interfering with the control signals
and on time duration (Figures 36 and 37). The noise induces
voltage spikes on the Control pin and Ct pin that reduces the
drive on time from the on time determined by the feedback
loop (t
on(loop)
). The reduced on time causes the energy
stored in the inductor (L) to be reduced. The result is that
V
ZCD
does not exceed V
ZCD(ARM)
and the drive remains off
until t
start
expires. This sequence results in pulse skipping
and reduced power factor.
Figure 36. Control Pin Noise Induced On Time
Reduction and Pulse Skipping
DRV Remains Off
DRV
is Not Exceeded
0 V
Noise Induced Voltage Spike
t
start
t
on
t
on(loop)
V
ZCD(ARM)
Low V
Control
Voltage
Low V
Ct(off)
Voltage
V
Control
− Ct
(offset)
V
Control
Ct
(offset)
V
Ct
V
Ct(off)
V
ZCD
V
ZCD(ARM)
V
ZCD(TRIG)
V
CL(NEG)