NCP1608
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19
Overvoltage Protection (OVP)
The low bandwidth of the feedback network causes
active PFC stages to react to changes in output load or input
voltages slowly. Consequently, there is a risk of overshoots
during startup, load steps, and line steps. For reliable
operation, it is critical that overvoltage protection (OVP)
prevents the output voltage from exceeding the ratings of
the PFC stage components. The NCP1608 detects
excessive output voltages and disables the driver until V
out
decreases to a safe level, which ensures that V
out
is within
the PFC stage component ratings. An internal comparator
connected to the FB pin provides the OVP protection. The
OVP detection voltage is calculated using Equation 13:
V
out(OVP)
+
V
OVP
V
REF
@ V
REF
@
ǒ
R
out1
@
R
out2
) R
FB
R
out2
@ R
FB
) 1
Ǔ
(eq. 13)
Where V
OVP
/V
REF
is the OVP detection threshold.
The value of C
bulk
is sized to ensure that OVP is not
inadvertently triggered by the 100 Hz or 120 Hz ripple of
V
out
. The minimum value of C
bulk
is calculated using
Equation 14:
C
bulk
w
P
out
2 @ p @ V
ripple(peak−peak)
@ f
line
@ V
out
(eq. 14)
Where V
ripple(peak-peak)
is the peak−to−peak output voltage
ripple and f
line
is the ac line frequency.
V
ripple(peak-peak)
is calculated using Equation 15:
V
ripple(peak−peak)
t 2 @
ǒ
V
out(OVP)
* V
out
Ǔ
(eq. 15)
The OVP logic includes hysteresis (V
OVP(HYS)
) to
ensure that V
out
has sufficient time to discharge before the
NCP1608 attempts to restart and to ensure noise immunity.
The output voltage at which the NCP1608 attempts a restart
(V
out(OVPL)
) is calculated using Equation 16:
V
out(OVPL)
+ ǒ
ǒ
V
OVP
V
REF
@ V
REF
Ǔ
* V
OVP(HYS)
Ǔ@
ǒ
R
out1
@
R
out2
) R
FB
R
out2
@ R
FB
) 1
Ǔ
(eq. 16)
Figure 43 depicts the operation of the OVP circuitry.
Figure 43. OVP Operation
OVP Fault
DRV
V
out(OVPL)
V
out(OVP)
V
out
Undervoltage Protection (UVP)
When the input voltage is applied to the PFC stage, V
out
is forced to equate to the peak of the line voltage. The
NCP1608 detects an undervoltage fault if V
out
is unusually
low, such that V
FB
is less than V
UVP
. During an UVP fault,
the drive and error amplifier are disabled. The UVP feature
protects the system if there is a disconnection in the power
path to C
bulk
(i.e. C
bulk
is unable to charge) or if R
out1
is
disconnected.
The output voltage that causes an UVP fault is calculated
using Equation 17:
V
out(UVP)
+ V
UVP
@
ǒ
R
out1
@
R
out2
) R
FB
R
out2
@ R
FB
) 1
Ǔ
(eq. 17)
Open Feedback Loop Protection
The NCP1608 features comprehensive protection
against open feedback loop conditions by including OVP,
UVP, and FPP. Figure 44 illustrates three conditions in
which the feedback loop is open. The corresponding
number below describes each condition shown in
Figure 44.
1. UVP Protection: The connection from R
out1
to
the FB pin is open. R
out2
pulls down the FB pin
to ground. The UVP comparator detects an UVP
fault and the drive and error amplifier are
disabled.
2. OVP Protection: The connection from R
out2
to
the FB pin is open. R
out1
pulls up the FB pin to
V
out
. The ESD diode clamps the FB voltage to
10 V and R
out1
limits the current into the FB pin.
The OVP comparator detects an OVP fault and
the drive is disabled.
NCP1608
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20
3. FPP Protection: The FB pin is floating. R
FB
pulls down the FB voltage below V
UVP
. The UVP
comparator detects an UVP fault and the drive
and error amplifier are disabled.
UVP and OVP protect the system from low bulk voltages
and rapid operating point changes respectively, while FPP
protects the system against floating feedback pin
conditions. If FPP is not implemented and a manufacturing
error causes the FB pin to float, then V
FB
is dependent on
the coupling within the system and the surrounding
environment. The coupled V
FB
may be within the
regulation limits (i.e. V
UVP
< V
FB
< V
REF
) and cause the
controller to deliver excessive power. The result is that V
out
increases until a component fails due to the voltage stress.
Figure 44. Open Feedback Loop Protection
FB
Control
E/A
+
+
+
UVP
Fault
(Enable EA)
+
+
OVP
+
Condition 1
Condition 2
Condition 3
V
out
C
bulk
R
out1
R
out2
C
COMP
V
EAH
Clamp
R
FB
V
REF
V
UVP
V
OVP
POK
g
m
V
Control
Overcurrent Protection (OCP)
The dedicated CS pin of the NCP1608 senses the
inductor peak current and limits the driver on time if the
voltage of the CS pin exceeds V
ILIM
. The maximum
inductor peak current is programmed by adjusting R
sense
.
The inductor peak current is calculated using Equation 18:
I
L(peak)
+
V
ILIM
R
sense
(eq. 18)
An internal LEB filter (Figure 45) reduces the
probability of switching noise inadvertently triggering the
overcurrent limit. This filter blanks out the CS signal for a
duration of t
LEB
. If additional filtering is necessary, a small
RC filter is connected between R
sense
and the CS pin.
Figure 45. OCP Circuitry with Optional
External RC Filter
CS
+
+
OCP
LEB
DRV
optional
R
sense
V
ILIM
Shutdown Mode
The NCP1608 enables the user to set the controller in a
standby mode of operation. To shutdown the controller, the
FB pin is forced to less than V
UVP
. When using the FB pin
for shutdown (Figure 46), the designer must ensure that no
significant leakage current exists in the shutdown circuitry.
Any leakage current affects the output voltage regulation.
Figure 46. Shutting Down the PFC Stage
1
4
3
2
8
5
6
7
NCP1608
Shutdown
R
out2
R
out1
V
out
NCP1608
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21
Application Information
ON Semiconductor provides an electronic design tool, a
demonstration board, and an application note to facilitate
the design of the NCP1608 and reduce development cycle
time. All the tools can be downloaded or ordered at
www.onsemi.com.
The electronic design tool allows the user to easily
determine most of the system parameters of a boost
pre−converter. The demonstration board is a boost
pre−converter that delivers 100 W at 400 V. The circuit
schematic is shown in Figure 47. The pre−converter design
is described in Application Note AND8396/D.
Figure 47. Application Schematic
C3
Dboost
Cin
D1
CVcc2
+
Cbulk
+
CVcc
Rdrv
Rs1
U1
NCP1608
5
ZCD
3
Ct
6
GND
4
CS
8
Vcc
7
DRV
1
FB
2
Control
Ro1b
Lboost
J3
J1
L2
F1
C2
Q1
Daux
Rzcd
Bridge
NTC
Rct
Rctup1
Rctup2
Ro1a
J2
Czcd
L1
Dvcc
Ccomp1
Ct1
Rout2a
Ct2
Rout2b
Rcs
Ccs
Rstart1
R1
Rstart2
Rs2
Rs3
Ddrv
C1
Rcomp1
Ccomp
t°

NCP1608BDR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Power Factor Correction - PFC COST EFFECT PWR FACT CONT
Lifecycle:
New from this manufacturer.
Delivery:
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