PCF8576C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 13 — 16 December 2013 35 of 62
NXP Semiconductors
PCF8576C
Universal LCD driver for low multiplex rates
12. Dynamic characteristics
[1] f
clk
< 125 kHz, I
2
C-bus maximum transmission speed is derated.
[2] All timing values are valid within the operating supply voltage and ambient temperature range and are referenced to V
IL
and V
IH
with an
input voltage swing of V
SS
to V
DD
.
Table 17. Dynamic characteristics
V
DD
= 1.8 V to 5.5 V; V
SS
= 0 V; V
LCD
= V
DD
2.0 V to V
DD
6.0 V; T
amb
=
40
Cto +85
C; unless otherwise specified.
Symbol Parameter Conditions Min Typ Max Unit
Timing characteristics: driver timing waveforms (see Figure 28
)
f
clk
clock frequency normal-power mode;
V
DD
= 5 V
[1]
125 200 315 kHz
power-saving mode;
V
DD
=3 V
21 31 48 kHz
t
clk(H)
clock HIGH time 1 - - s
t
clk(L)
clock LOW time 1 - - s
t
PD(SYNC_N)
SYNC propagation delay - - 400 ns
t
SYNC_NL
SYNC LOW time 1 - - s
t
PD(drv)
driver propagation delay V
LCD
= 5 V --30s
Timing characteristics: I
2
C-bus (see Figure 29)
[2]
t
BUF
bus free time between a STOP and START
condition
4.7 - - s
t
HD;STA
hold time (repeated) START condition 4.0 - - s
t
SU;STA
set-up time for a repeated START condition 4.7 - - s
t
LOW
LOW period of the SCL clock 4.7 - - s
t
HIGH
HIGH period of the SCL clock 4.0 - - s
t
r
rise time of both SDA and SCL signals - - 1 s
t
f
fall time of both SDA and SCL signals - - 0.3 s
C
b
capacitive load for each bus line - - 400 pF
t
SU;DAT
data set-up time 250 - - ns
t
HD;DAT
data hold time 0 - - ns
t
SU;STO
set-up time for STOP condition 4.0 - - s
