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PCF8576CHL/1,118

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P62
PCF8576C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 13 — 16 December 2013 61 of 62
NXP Semiconductors
PCF8576C
Universal LCD driver for low multiplex rates
26. Figures
Fig 1. Block diagram of PCF8576C . . . . . . . . . . . . . . . . .3
Fig 2. Pin configuration for LQFP64 (PCF8576CHL/1) . .4
Fig 3. Pin configuration for VSO56 (PCF8576CT/1) . . . .5
Fig 4. Pin locations of PCF8576CU/F1 and
PCF8576CU/2/F2 . . . . . . . . . . . . . . . . . . . . . . . . .6
Fig 5. Example of displays suitable for PCF8576C . . . . .8
Fig 6. Typical system configuration . . . . . . . . . . . . . . . . .9
Fig 7. Electro-optical characteristic: relative
transmission curve of the liquid . . . . . . . . . . . . . .12
Fig 8. Static drive mode waveforms. . . . . . . . . . . . . . . .13
Fig 9. Waveforms for the 1:2 multiplex drive mode
with
1
⁄
2
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Fig 10. Waveforms for the 1:2 multiplex drive mode
with
1
⁄
3
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Fig 11. Waveforms for the 1:3 multiplex drive mode
with
1
⁄
3
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Fig 12. Waveforms for the 1:4 multiplex mode
with
1
⁄
3
bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Fig 13. Display RAM bit map . . . . . . . . . . . . . . . . . . . . . .20
Fig 14. Relationship between LCD layout, drive mode,
display RAM filling order, and display data
transmitted over the I
2
C-bus . . . . . . . . . . . . . . . .21
Fig 15. Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Fig 16. Definition of START and STOP conditions. . . . . .24
Fig 17. System configuration . . . . . . . . . . . . . . . . . . . . . .25
Fig 18. Acknowledgement of the I
2
C-bus . . . . . . . . . . . .25
Fig 19. I
2
C-bus protocol. . . . . . . . . . . . . . . . . . . . . . . . . .27
Fig 20. General format of the command byte . . . . . . . . .27
Fig 21. Device protection diagram . . . . . . . . . . . . . . . . . .30
Fig 22. I
SS
as a function of f
fr
. . . . . . . . . . . . . . . . . . . . . .33
Fig 23. I
DD(LCD)
as a function of f
fr
. . . . . . . . . . . . . . . . . .33
Fig 24. I
SS
as a function of V
DD
. . . . . . . . . . . . . . . . . . . .34
Fig 25. I
DD(LCD)
as a function of V
DD
. . . . . . . . . . . . . . . .34
Fig 26. R
O(max)
as a function of V
DD
. . . . . . . . . . . . . . . . .34
Fig 27. R
O(max)
as a function of T
amb
. . . . . . . . . . . . . . . .34
Fig 28. Driver timing waveforms . . . . . . . . . . . . . . . . . . .36
Fig 29. I
2
C-bus timing waveforms . . . . . . . . . . . . . . . . . .36
Fig 30. Cascaded PCF8576C configuration . . . . . . . . . .38
Fig 31. Synchronization of the cascade for the various
PCF8576C drive modes . . . . . . . . . . . . . . . . . . .39
Fig 32. Single plane wiring of packaged PCF8576CT . . .40
Fig 33. Package outline SOT314-2 (LQFP64) of
PCF8576CHL/1 . . . . . . . . . . . . . . . . . . . . . . . . . .41
Fig 34. Package outline SOT190-1 (VSO56) of
PCF8576CT/1 . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Fig 35. Bare die outline of PCF8576CU/2/F2 . . . . . . . . .43
Fig 36. Bare die outline of PCF8576CU/F1 . . . . . . . . . . .44
Fig 37. Tray details . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
Fig 38. Tray alignment . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Fig 39. Temperature profiles for large and small
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51
NXP Semiconductors
PCF8576C
Universal LCD driver for low multiplex rates
© NXP B.V. 2013. All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 16 December 2013
Document identifier: PCF8576C
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
27. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 2
3.1 Ordering options. . . . . . . . . . . . . . . . . . . . . . . . 2
4 Marking. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 4
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 7
7 Functional description . . . . . . . . . . . . . . . . . . . 8
7.1 Power-On-Reset (POR) . . . . . . . . . . . . . . . . . . 9
7.2 LCD bias generator . . . . . . . . . . . . . . . . . . . . . 9
7.3 LCD voltage selector . . . . . . . . . . . . . . . . . . . . 9
7.3.1 Electro-optical performance . . . . . . . . . . . . . . 11
7.4 LCD drive mode waveforms . . . . . . . . . . . . . . 13
7.4.1 Static drive mode . . . . . . . . . . . . . . . . . . . . . . 13
7.4.2 1:2 Multiplex drive mode. . . . . . . . . . . . . . . . . 14
7.4.3 1:3 Multiplex drive mode. . . . . . . . . . . . . . . . . 16
7.4.4 1:4 multiplex drive mode. . . . . . . . . . . . . . . . . 17
7.5 Oscillator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.5.1 Internal clock . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.5.2 External clock . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.6 Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.7 Display register. . . . . . . . . . . . . . . . . . . . . . . . 19
7.8 Shift register . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.9 Segment outputs. . . . . . . . . . . . . . . . . . . . . . . 19
7.10 Backplane outputs . . . . . . . . . . . . . . . . . . . . . 19
7.11 Display RAM. . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.12 Data pointer . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.13 Sub-address counter . . . . . . . . . . . . . . . . . . . 22
7.14 Bank selector . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.14.1 Output bank selector . . . . . . . . . . . . . . . . . . . 23
7.14.2 Input bank selector . . . . . . . . . . . . . . . . . . . . . 23
7.15 Blinking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.16 Characteristics of the I
2
C-bus. . . . . . . . . . . . . 24
7.16.1 Bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.16.2 START and STOP conditions . . . . . . . . . . . . . 24
7.16.3 System configuration . . . . . . . . . . . . . . . . . . . 24
7.16.4 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.16.5 PCF8576C I
2
C-bus controller. . . . . . . . . . . . . 26
7.16.6 Input filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.17 I
2
C-bus protocol . . . . . . . . . . . . . . . . . . . . . . . 26
7.18 Command decoder. . . . . . . . . . . . . . . . . . . . . 27
7.18.1 Mode-set command . . . . . . . . . . . . . . . . . . . . 28
7.18.2 Load-data-pointer command. . . . . . . . . . . . . . 28
7.18.3 Device-select command . . . . . . . . . . . . . . . . . 28
7.18.4 Bank-select command . . . . . . . . . . . . . . . . . . 29
7.18.5 Blink-select command . . . . . . . . . . . . . . . . . . 29
7.19 Display controller . . . . . . . . . . . . . . . . . . . . . . 29
8 Internal circuitry . . . . . . . . . . . . . . . . . . . . . . . 30
9 Safety notes. . . . . . . . . . . . . . . . . . . . . . . . . . . 30
10 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 31
11 Static characteristics . . . . . . . . . . . . . . . . . . . 32
11.1 Typical supply current characteristics . . . . . . 33
11.2 Typical LCD output characteristics. . . . . . . . . 34
12 Dynamic characteristics. . . . . . . . . . . . . . . . . 35
13 Application information . . . . . . . . . . . . . . . . . 37
13.1 Cascaded operation. . . . . . . . . . . . . . . . . . . . 37
14 Package outline. . . . . . . . . . . . . . . . . . . . . . . . 41
15 Bare die outline . . . . . . . . . . . . . . . . . . . . . . . . 43
16 Handling information . . . . . . . . . . . . . . . . . . . 47
17 Packing information . . . . . . . . . . . . . . . . . . . . 47
17.1 Tray information. . . . . . . . . . . . . . . . . . . . . . . 47
18 Soldering of SMD packages. . . . . . . . . . . . . . 49
18.1 Introduction to soldering. . . . . . . . . . . . . . . . . 49
18.2 Wave and reflow soldering. . . . . . . . . . . . . . . 49
18.3 Wave soldering . . . . . . . . . . . . . . . . . . . . . . . 49
18.4 Reflow soldering . . . . . . . . . . . . . . . . . . . . . . 50
19 Appendix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
19.1 LCD segment driver selection . . . . . . . . . . . . 52
20 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 55
21 References. . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
22 Revision history . . . . . . . . . . . . . . . . . . . . . . . 57
23 Legal information . . . . . . . . . . . . . . . . . . . . . . 58
23.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 58
23.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
23.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 58
23.4 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 59
24 Contact information . . . . . . . . . . . . . . . . . . . . 59
25 Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
26 Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
27 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P62

PCF8576CHL/1,118

Mfr. #:
Buy PCF8576CHL/1,118
Manufacturer:
NXP Semiconductors
Description:
LCD Drivers UNIVERSAL LCD DRIVER LOW MULTIPLEX RATES
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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