PCF8576C All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 13 — 16 December 2013 45 of 62
NXP Semiconductors
PCF8576C
Universal LCD driver for low multiplex rates
Table 19. Pad and bump description for PCF8576CU
All x/y coordinates represent the position of the center of each pad with respect to the center
(x/y = 0) of the chip.
Symbol Pad X (m) Y (m) Description
SDA 1 74 1380 I
2
C-bus serial data input/output
SCL 2 148 1380 I
2
C-bus serial clock input
SYNC
3 355 1380 cascade synchronization input/output
CLK 4 534 1380 external clock input/output
V
DD
5 742 1380 supply voltage
OSC 6 913 1380 internal oscillator enable input
A0 7 1087 1380 subaddress input
A1 8 1290 1284 subaddress input
A2 9 1290 1116 subaddress input
SA0 10 1290 945 subaddress input
V
SS
11 1290 751 logic ground
V
LCD
12 1290 485 LCD supply voltage
BP0 13 1290 125 LCD backplane output
BP2 14 1290 285 LCD backplane output
BP1 15 1290 458 LCD backplane output
BP3 16 1290 618 LCD backplane output
S0 17 1290 791 LCD segment output
S1 18 1290 951 LCD segment output
S2 19 1290 1124 LCD segment output
S3 20 1290 1284 LCD segment output
S4 21 1074 1380 LCD segment output
S5 22 914 1380 LCD segment output
S6 23 741 1380 LCD segment output
S7 24 581 1380 LCD segment output
S8 25 408 1380 LCD segment output
S9 26 248 1380 LCD segment output
S10 27 75 1380 LCD segment output
S11 28 85 1380 LCD segment output
S12 29 258 1380 LCD segment output
S13 30 418 1380 LCD segment output
S14 31 591 1380 LCD segment output
S15 32 751 1380 LCD segment output
S16 33 924 1380 LCD segment output
S17 34 1084 1380 LCD segment output
S18 35 1290 1243 LCD segment output
S19 36 1290 1083 LCD segment output
S20 37 1290 910 LCD segment output
S21 38 1290 750 LCD segment output
S22 39 1290 577 LCD segment output
