DAC1405D650 5 © IDT 2012. All rights reserved.
Product data sheet Rev. 05 — 2 July 2012 13 of 41
Integrated Device Technology
DAC1405D650
Dual 14-bit DAC, up to 650 Msps; 2, 4 and 8 interpolating
10. Application information
10.1 General description
The DAC1405D650 is a dual 14-bit DAC operating at up to 650 Msps. Each DAC consists
of a segmented architecture, comprising a 6-bit thermometer sub-DAC and an 8-bit binary
weighted sub-DAC.
With an input data rate of up to 160 MHz, and a maximum output sampling rate of
650 Msps, the DAC1405D650 allows more flexibility for wide bandwidth and multi-carrier
systems. Combined with its quadrature modulator and its 32-bit NCO, the DAC1405D650
simplifies the frequency selection of the system. This is also possible because of the 2,
4 and 8 interpolation filters that remove undesired images.
Two modes are available for the digital input. In the Dual-port mode, each DAC uses its
own data input line and in the Interleaved mode, both DACs use the same data input line.
Each DAC generates two complementary current outputs on pins IOUTAP/IOUTAN and
IOUTBP/IOUTBN. This provides a full-scale output current (I
O(fs)
) up to 20 mA. An internal
reference is available for the reference current which is externally adjustable using pin
VIRES.
There are also some embedded features to provide an analog offset correction (auxiliary
DACs) and digital offset control as well as for gain adjustment. All the functions can be set
via an SPI interface.
The DAC1405D650 operates at both 3.3 V and 1.8 V each of which has separate digital
and analog power supplies. The digital input is 3.3 V compliant and the clock input is
LVDS compliant.
10.2 Serial interface (SPI)
10.2.1 Protocol description
The DAC1405D650 serial interface is a synchronous serial communication port allowing
easy interfacing with many industry microprocessors. It provides access to the registers
that define the operating modes of the chip in both write and read modes.
This interface can be configured as a 3-wire type (SDIO as bidirectional pin) or a 4-wire
type (SDIO and SDO as unidirectional pin, input and output port respectively). In both
configurations, SCLK acts as the serial clock, and SCS_N acts as the serial chip select
bar. If several DAC1405D650 devices are connected to an application on the same
SPI-bus, only a 3-wire type can be used.
Each read/write operation is sequenced by the SCS_N signal and enabled by a LOW
assertion to drive the chip with 1 to 4 bytes, depending on the content of the instruction
byte (see Table 7).
