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TDA19977AHV/15,557

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P40
TDA19977A_TDA19977B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 7 August 2008 28 of 40
NXP Semiconductors
TDA19977A; TDA19977B
Triple input HDMI receiver interface with digital processing
14. Example of supported video formats
Table 17. Example of supported video formats
Standard Format Total pixels ×
total lines
Horizontal
rate (kHz)
Pixel clock
rate (MHz)
[1]
576i
[2]
1440 × 576i 50 Hz 1728 × 625 15.750 27.000
[3]
480i
[4]
1440 × 480i 59.94 Hz 1716 × 525 15.734 27.000
[3]
1440 × 480i 60 Hz 1716 × 525 15.750 27.027
[3]
576p 720 × 576p 50 Hz 864 × 625 31.250 27.000
480p 720 × 480p 59.94 Hz 858 × 525 31.469 27.000
720 × 480p 60 Hz 858 × 525 31.500 27.027
720p 1280 × 720p 50 Hz 1980 × 750 37.500 74.250
1280 × 720p 59.94 Hz 1650 × 750 44.955 74.176
1280 × 720p 60 Hz 1650 × 750 45.000 74.250
1080i 1920 × 1080i 50 Hz 2640 × 1125 28.125 74.250
1920 × 1080i 59.94 Hz 2200 × 1125 33.716 74.176
1920 × 1080i 60 Hz 2200 × 1125 33.750 74.250
1080p 1920 × 1080p 50 Hz 2640 × 1125 56.250 148.500
1920 × 1080p 59.94 Hz 2200 × 1125 67.433 148.352
1920 × 1080p 60 Hz 2200 × 1125 67.500 148.500
0.31M3 VGA 640 × 480p 60 Hz 800 × 525 31.469 25.175
640 × 480p 72 Hz 832 × 520 37.861 31.500
640 × 480p 75 Hz 840 × 500 37.500 31.500
640 × 480p 85 Hz 832 × 509 43.269 36.000
0.48M3 SVGA 800 × 600p 56 Hz 1024 × 625 35.156 36.000
800 × 600p 60 Hz 1056 × 628 37.879 40.000
800 × 600p 72 Hz 1040 × 666 48.077 50.000
800 × 600p 75 Hz 1056 × 625 46.875 49.500
800 × 600p 85 Hz 1048 × 631 53.674 56.250
0.48M3-R 800 × 600p 120 Hz 960 × 636 76.302 73.250
0.41M9 848 × 480p 60 Hz 1088 × 517 31.020 33.750
0.79M3 XGA 1024 × 768p 43 Hz 1264 × 817 35.522 44.900
1024 × 768p 60 Hz 1344 × 806 48.363 65.000
1024 × 768p 70 Hz 1328 × 806 56.476 75.000
1024 × 768p 75 Hz 1312 × 800 60.023 78.750
1024 × 768p 85 Hz 1376 × 808 68.677 94.500
0.79M3-R XGA 1024 × 768p 120 Hz 1184 × 813 97.551 115.500
1.00M3 1152 × 864p 75 Hz 1600 × 900 67.500 108.000
0.98M9-R 1280 × 768p 60 Hz 1440 × 790 47.396 68.250
1280 × 768p 120 Hz 1440 × 813 97.396 140.250
0.98M9 1280 × 768p 60 Hz 1664 × 798 47.776 79.500
1280 × 768p 75 Hz 1696 × 805 60.289 102.250
1280 × 768p 85 Hz 1712 × 809 68.633 117.500
TDA19977A_TDA19977B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 7 August 2008 29 of 40
NXP Semiconductors
TDA19977A; TDA19977B
Triple input HDMI receiver interface with digital processing
[1] Pixel clock rate corresponds to VCLK output for 4:4:4 format and 4:2:2 semi-planar; VCLK / 2 for 4:2:2
ITU-R BT.656 format. The pixel clock rate can be determined by:
a) Total pixels × total lines × frame rate for the progressive format.
b) Total pixels × total lines × frame rate / 2 for the interlaced format.
[2] Also referred to as PAL (Phase Alternating Line).
[3] Pixel-doubling.
[4] Also referred to as NTSC (National Television Standards Committee).
[5] Only supports Deep Color mode 10-bit.
[6] Sometimes also referred to as WUXGA (Wide Ultra eXtended Graphics Array).
1.02MA-R 1280 × 800p 60 Hz 1440 × 823 49.306 71.000
1280 × 800p 120 Hz 1440 × 847 101.563 146.250
1.02MA 1280 × 800p 60 Hz 1680 × 831 49.702 83.500
1280 × 800p 75 Hz 1696 × 838 62.795 106.500
1280 × 800p 85 Hz 1712 × 843 71.554 122.500
1.23M3 1280 × 960p 60 Hz 1800 × 1000 60.000 108.000
1280 × 960p 85 Hz 1728 × 1011 85.938 148.500
1.31M4 SXGA 1280 × 1024p 60 Hz 1688 × 1066 63.981 108.000
1280 × 1024p 75 Hz 1688 × 1066 79.976 135.000
1280 × 1024p 85 Hz
[5]
1728 × 1072 91.146 157.500
1.04M9 1360 × 768p 60 Hz 1792 × 795 47.712 85.500
1.04M9-R 1360 × 768p 120 Hz 1520 × 813 97.533 148.250
1.47M3-R 1400 × 1050p 60 Hz 1560 × 1080 64.744 101.000
1.47M3 1400 × 1050p 60 Hz 1864 × 1089 65.317 121.750
1400 × 1050p 75 Hz
[5]
1896 × 1099 82.278 156.000
1.29MA-R 1440 × 900p 60 Hz 1600 × 926 55.469 88.750
1.29MA 1440 × 900p 60 Hz 1904 × 934 55.935 106.500
1440 × 900p 75 Hz 1936 × 942 70.635 136.750
1440 × 900p 85 Hz
[5]
1952 × 948 80.430 157.000
1.92M3 UXGA 1600 × 1200p 60 Hz
[5]
2160 × 1250 75.000 162.000
1.76MA-R 1680 × 1050p 60 Hz 1840 × 1080 64.674 119.000
1.76MA 1680 × 1050p 60 Hz 2240 × 1089 65.290 146.250
2.30MA-R
[6]
1920 × 1200p 60 Hz 2080 × 1235 74.038 154.000
Table 17. Example of supported video formats
…continued
Standard Format Total pixels ×
total lines
Horizontal
rate (kHz)
Pixel clock
rate (MHz)
[1]
TDA19977A_TDA19977B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 7 August 2008 30 of 40
NXP Semiconductors
TDA19977A; TDA19977B
Triple input HDMI receiver interface with digital processing
15. Application information
Fig 7. Application diagram of TDA19977A; TDA19977B
001aai385
0 Ω
12 kΩ 1%
V
SSC
1081
V
DDH(1V8)
TDA19977
PD
1072
V
DDC(1V8)
V
DDH(3V3)
3.3 V
HDMI
3.3 V
HDMI
1.8 V
DIG
3.3 V
DIG
1.8 V
DIG
3.3 V
DIG
1.8 V
DIG
3.3 V
DIG
3.3 V
DIG
3.3 V
DIG
3.3 V
HDMI
3.3 V
HDMI
3.3 V
HDMI
3.3 V
HDMI
12 kΩ 1%
3.3 V
HDMI
1.8 V
HDMI
3.3 V
HDMI
3.3 V
HDMI
3.3 V
HDMI
1.8 V
HDMI
1.8 V
DIG
3.3 V
DIG_I
1.8 V
DIG
1.8 V
HDMI
1.8 V
DIG
1.8 V
HDMI
1.8 V
DIG
3.3 V
DIG_I
3.3 V
DIG
3.3 V
HDMI
1.8 V
HDMI
1063
RRX1
n.c.
1054
V
SSH
n.c.
1045
V
DDH(3V3)
V
SSH
1036
TEST0
RXCC−
1027
HSCLB
RXCC+
1018
HSDAB
V
DDH(3V3)
1009
HSCLA
n.c.
9910
HSDAA
n.c.
9811
SCL
V
SSH
9712
SDA
RXC0−
9613
VAI
RXC0+
9514
V
DDI(3V3)
V
DDH(1V8)
9415
XTALIN/MCLK
n.c.
9316
XTALOUT
n.c.
9217
V
DDC(1V8)
V
SSH
9118
V
SSH
RXC1−
9019
V
DDH(1V8)
RXC1+
8920
V
SSH
V
DDH(3V3)
8821
V
DDH(3V3)
n.c.
8722
V
DDH(3V3)
n.c.
8623
V
SSO
V
SSH
8524
AP5/SYSCLK
RXC2−
8425
V
DDO(3V3)
RXC2+
8326
AP4/WS
V
PP
8227
AP3
GNDC
GNDC
GNDC
GNDC
GNDC
GNDC
V
DDC(1V8)
8128
AP2
V
DDO(3V3)
8029
AP1
VCLK
7930
AP0
V
SSO
7831
ACLK
CS/FREF
7732
V
SSO
VS/VREF
7633
VP[29]
HS/HREF
7534
VP[28]
DE
7435
V
DDO(3V3)
VP[0]
7336
V
SSC
V
SSC
14437
V
DDH(1V8)
VP[1]
14338
RRX2
VP[2]
14239
V
DDI(3V3)
VP[3]
14140
n.c.
HDMI inputs C
HDMI inputs A and B
control outputs and video port outputs
DDC C
I
2
C-bus27 MHz DDC A and B
audio port output
V
DDO(3V3)
14041
n.c.
V
DDC(1V8)
13942
HSCLC
V
SSO
13843
HSDAC
VP[4]
13744
V
DDC(1V8)
VP[5]
13645
V
DDC(1V8)
VP[6]
13546
V
SSH
VP[7]
13447
RXA2+
VP[8]
13348
RXA2−
VP[9]
13249
V
SSH
VP[10]
13150
RXB2−
VP[11]
13051
RXB2+
V
DDO(3V3)
12952
V
DDH(3V3)
VP[12]
12853
RXA1+
V
SSO
12754
RXA1−
VP[13]
12655
V
SSH
VP[14]
12556
RXB1−
VP[15]
12457
RXB1+
VP[16]
12358
V
DDH(1V8)
VP[17]
12259
RXA0+
VP[18]
12160
RXA0−
VP[19]
12061
V
SSH
VP[20]
11962
RXB0−
V
DDO(3V3)
11863
RXB0+
V
DDC(1V8)
11764
V
DDH(3V3)
V
SSO
11665
RXAC+
VP[21]
11566
RXAC−
VP[22]
11467
V
SSH
VP[23]
11368
RXBC−
VP[24]
11269
RXBC+
VP[25]
11170
V
DDH(3V3)
VP[26]
11071
A0
VP[27]
10972
V
SSC
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P40

TDA19977AHV/15,557

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Buy TDA19977AHV/15,557
Manufacturer:
NXP Semiconductors
Description:
Bus Receivers TRPL INPUT HDMI 1.3A COMP RECEIVER INTFCE
Lifecycle:
New from this manufacturer.
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