TDA19977A_TDA19977B_1 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 01 — 7 August 2008 6 of 40
NXP Semiconductors
TDA19977A; TDA19977B
Triple input HDMI receiver interface with digital processing
7. Pinning information
7.1 Pinning
7.2 Pin description
Fig 2. Pin configuration for TDA19977A; TDA19977B
TDA19977
001aai382
108
37
72
144
109
73
1
36
Table 3. Pin description
Symbol Pin Type
[1]
Description
V
SSC
1 G ground for the digital core
PD 2 I power-down control input (active HIGH)
V
DDH(3V3)
3 P HDMI receiver supply voltage; 3.3 V
n.c. 4 I not connected
n.c. 5 I not connected
V
SSH
6 G HDMI receiver ground
RXCC− 7 I HDMI input C negative clock channel
RXCC+ 8 I HDMI input C positive clock channel
V
DDH(3V3)
9 P HDMI receiver supply voltage; 3.3 V
n.c. 10 I not connected
n.c. 11 I not connected
V
SSH
12 G HDMI receiver ground
RXC0− 13 I HDMI input C negative data channel 0
RXC0+ 14 I HDMI input C positive data channel 0
V
DDH(1V8)
15 P HDMI receiver supply voltage; 1.8 V
n.c. 16 I not connected
n.c. 17 I not connected
V
SSH
18 G HDMI receiver ground
RXC1− 19 I HDMI input C negative data channel 1
RXC1+ 20 I HDMI input C positive data channel 1
V
DDH(3V3)
21 P HDMI receiver supply voltage; 3.3 V
n.c. 22 I not connected
n.c. 23 I not connected
