MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
38 ______________________________________________________________________________________
Power-Up/Power-Down Faults
All EN_OUTs are deasserted if an overvoltage or under-
voltage fault is detected during power-up/power-down
(regardless of the critical fault enable bits). Under these
conditions, information of the failing slot is stored in
EEPROM r00h[3:0] unless the fault register is config-
ured not to store any information by setting r47h[1:0] to
‘11’ (see Table 17).
If there is a tracking fault on a channel configured for
closed-loop tracking, a fault log operation occurs and the
bits representing the failed tracking channels are set to
‘0’ unless the fault register is configured not to store any
information by setting r47h[1:0] to ‘11’ (see Table 17).
Autoretry/Latch Mode
For critical faults, the MAX16047/MAX16049 can be
configured for one of two fault management methods:
autoretry or latch-on-fault. Set r4Fh[3] to ‘0’ to select
autoretry mode. In this configuration, the device will
shut down after a critical fault event then restart follow-
ing a configurable delay. Use r4Fh[2:0] to select an
autoretry delay from 20µs to 1.6s. See Table 19 for
more information on setting the autoretry delay.
Set r4Fh[3] to ‘1’ to select the latch-on-fault mode. In
this configuration EN_OUT_s are deasserted after a
critical fault event. The device does not re-initiate the
power-up sequence until EN is toggled or the Software
Enable bit is reset to ‘0.’ See the
Enable
section for
more information on setting the Software Enable bit.
If fault information is stored in EEPROM (see the
Critical
Faults
section) and autoretry mode is selected, set an
autoretry delay greater than the time required for the
storing operation. If fault information is stored in EEP-
ROM and latch-on-fault mode is chosen, toggle EN or
reset the Software Enable bit only after the completion
of the storing operation. If saving information about the
failed lines only, ensure a delay of at least 60ms before
the restart procedure. Otherwise, ensure a minimum
204ms timeout. This ensures that ADC conversions are
completed and values are stored correctly in EEPROM.
See Table 20 for more information about required fault
log operation periods.
Table 19. Fault Recovery Configuration
