MAX16047/MAX16049
LOAD ADDRESS: This is an extension to the standard
IEEE 1149.1 instruction set to support access to the
memory in the MAX16047/MAX16049. When the LOAD
ADDRESS instruction latches into the instruction regis-
ter, TDI connects to TDO through the 8-bit memory
address test data register during the shift-DR state.
READ DATA: This is an extension to the standard IEEE
1149.1 instruction set to support access to the memory
in the MAX16047/MAX16049. When the READ DATA
instruction latches into the instruction register, TDI con-
nects to TDO through the 8-bit memory read test data
register during the shift-DR state.
WRITE DATA: This is an extension to the standard
IEEE 1149.1 instruction set to support access to the
memory in the MAX16047/MAX16049. When the WRITE
DATA instruction latches into the instruction register,
TDI connects to TDO through the 8-bit memory write
test data register during the shift-DR state.
REBOOT: This is an extension to the standard IEEE
1149.1 instruction set to initiate a software controlled
reset to the MAX16047/MAX16049. When the REBOOT
instruction latches into the instruction register, the
MAX16047/MAX16049 resets and immediately begins
the boot-up sequence.
SAVE: This is an extension to the standard IEEE 1149.1
instruction set that triggers a fault log. The current ADC
conversion results along with fault information are
saved to EEPROM depending on the configuration of
the Critical Fault Log Control register (r47h).
SETEXTRAM: This is an extension to the standard IEEE
1149.1 instruction set that allows access to the extend-
ed page. Extended registers include ADC conversion
results and GPIO input/output data.
RSTEXTRAM: This is an extension to the standard IEEE
1149.1 instruction set. Use RSTEXTRAM to return to the
default page and disable access to the extended page.
SETEEPADD: This is an extension to the standard IEEE
1149.1 instruction set that allows access to the EEPROM
page. Once the SETEEPADD command has been sent, all
addresses are recognized as EEPROM addresses only.
When accessing any EEPROM location, set the address
to the desired location, perform a dummy READ DATA
operation, and then set the address back to the desired
location. This primes the device for a subsequent series of
READ DATA operations.
RSTEEPADD: This is an extension to the standard IEEE
1149.1 instruction set. Use RSTEEPADD to return to the
default page and disable access to the EEPROM.
Applications Information
Unprogrammed Device Behavior
When the EEPROM has not been programmed using the
JTAG or I
2
C interface, the default configuration of the
EN_OUT_ outputs is open-drain active-low. If it is neces-
sary to hold an EN_OUT_ high or low to prevent prema-
ture startup of a power supply before the EEPROM is
programmed, connect a resistor to ground or the supply
voltage. Avoid connecting a resistor to ground if the out-
put is to be configured as open-drain with a separate
pullup resistor.
Device Behavior at Power-Up
When V
CC
is ramped from 0V, the RESET output is high
impedance until V
CC
reaches 1.4V, at which point it is
driven low. All other outputs are high impedance until
V
CC
reaches 2.85V, when the EEPROM contents are
copied into register memory, and after which the out-
puts assume their programmed states.
Maintaining Power During a
Fault Condition
Power to the MAX16047/MAX16049 must be main-
tained for a specific period of time to ensure a success-
ful EEPROM fault log operation during a fault that
removes power to the circuit. The amount of time
required depends on the settings in the fault control
register (r47h[1:0]) according to Table 30.
Table 30. EEPROM Fault Log Operation
Period
