SLWS137A
GC3021A
3.3V MIXER AND CARRIER
REMOVAL CHIP
DATASHEET
October 2002
This datasheet contains information which may be changed at any time without notice.
Texas Instruments Incorporated - i -
GC3021A 3.3V MIXER AND CARRIER REMOVAL CHIP SLWS137A
This document contains information which may be changed at any time without notice
REVISION HISTORY
This datasheet is revised from the GC3021 datasheet to reflect the changes in the GC3021A replacement.
0.1 GC3021A TO GC3021 COMPARISON
The GC3021A is designed to be a functional and footprint compatible replacement for the GC3021 chip. The
timing specifications for the GC3021A meet and exceed the timing specifications for the GC3021. Electrically the
GC3021A is a 3.3 volt only part, making it incompatible with the GC3021’s 5 volt mode. The GC3021A does not support
the PECL high speed interface from the GC3021. Except for this change, the GC3021A is fully compatible with the
GC3021’s 3.3 volt mode, but at a lower power consumption. See Section 5 for timing and electrical specifications.
NOTE: The GC3021A inputs are NOT 5 volt tolerant; chip damage may occur if the input voltages exceed Vcc + 0.5V
(3.8 volts). Designs using the GC3021 at 5 volts will need to add a 3.3 volt supply and voltage level translators to use
the GC3021A.
The function of the GC3021A has been slightly enhanced, but any enhancements are “backward” compatible
with the GC3021 with the exception of the power down control. In the GC3021A the user must set bit 15 of control
register 1. Highlights of the enhancements follow.
0.1.1 Clock Loss Detect and Power Down Modes
The GC3021 chip used a slow internal clock to power down the chip or to put it into a low power mode if the
clock is stopped. The slow clock has been removed in the GC3021A and replaced with a mode that will put the chip in
a fully static mode if the clock has stopped. The fully static mode powers down the chip and reduces the power
consumption down to a few microwatts until the clock resumes. The user can also force the power down state if desired.
Two control bits (address 13 bits 6 and 7) are used to control the clock loss detect and power down modes. One control
bit turns off the clock loss detect circuit, the other forces the power down mode. Both bits are cleared at power up to
keep GC3021 compatibility. THE USER MUST SET POWER DOWN TO A “2” TO OPERATE THE CHIP.
See Section 2.9 for details.
0.1.2 Control Interface
The control interface has been enhanced to use either the R/W and CS strobes of the original GC3021, or to
use the RE, WE and CE strobes used by most memory interfaces. If the RE pin is grounded, then the interface behaves
in the R/W
and CS mode, where the WE pin becomes the R/W pin and the CE pin becomes the CS pin. The RE pin on
the GC3021A chip is a ground pin (pin 58) on the GC3021 chip, so that a GC3021A chip soldered into a GC3021 socket
will automatically operate in the GC3021 R/W and CS mode.
See Section 2.1 for details.
Revision Date Description
1.0 9 Sept2002 First GC3021A datasheet. Major changes in specifications to reflect 3.3volt opera-
tion.
Texas Instruments Incorporated - 1 -
GC3021A 3.3V MIXER AND CARRIER REMOVAL CHIP SLWS137A
This document contains information which may be changed at any time without notice
GC3021A DATASHEET
1.1 BLOCK DIAGRAM
A block diagram illustrating the major functions of the chip is shown in Figure 1
Figure 1. GC3021A BLOCK DIAGRAM
INPUT
FORMAT
MIXER
OUTPUT
FORMAT
PHASE ERROR
LOOKUP RAM
4K BY 1 Memory
SNAPSHOT
RAM
NCO
CIRCUIT
PHASE
LOCK
LOOP
CIRCUIT
Complex data at 100 MHz
Real data at 200 MHz
DATA OUT
Quad 64 Word
Memory
12 Bits
12 Bits
12 Bits
12 Bits
12 Bits
12 Bits
12 Bits
12 Bits
12 Bits
12 Bits
12 Bits
12 Bits
12 Bits
12 Bits
12 Bits
1 Bit
32 Bits
DATA IN
Odd/Even Complex Pairs,
Complex Samples,
or I/Q Symbols
(70 MHz)
SYMBOL
ALIGN
EIN
1 Bit
CIN
1 Bit
EOUT
SB
SA
SYNC
COUNTER
SO
A[0:8]
CS
9 Bits
16 Bits
RE, WE
C[0:15]
CONTROL
INTERFACE
Internal Controls
Internal
Syncs
CKENA
CK
CLOCK
GENERATOR
Internal
Clocks
CKENB
SN
I[0:11]
Q[0:11]
YA[0:11]
YB[0:11]
YC[0:11]
YD[0:11]
12 Bits
12 Bits
12 Bits
Carry In
sync
HSO
AND
DC REMOVAL
MIXER MODE
200 MSPS real input data
(even/odd data at 100MSPS)
100 MSPS complex input data
(TTL level inputs)
12 bit inputs and outputs
32 bit NCO phase control
NCO generates 12 bit sines and cosines
1.0 KEY FEATURES
CARRIER REMOVAL MODE
100 Million Complex Samples per second (CSPS)
input data
12 bit input and output data
12 bit by 12 bit complex multiplier
4K bit phase error lookup RAM
Phase error feedback loop for carrier and
phase offset removal
32 bit numerically controlled oscillator (NCO)
Snapshot memory for adaptive filtering
OVERALL
Microprocessor interface for control,
output, and diagnostics
Built in diagnostics
500 mW power at 100 MHz, 3.3 volts
160 pin plastic quad flat pack package

LT5546EUF#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Modulator / Demodulator 17MHz Demodulator w. VGA
Lifecycle:
New from this manufacturer.
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