REV. B
AD73360
27
DSP SPORT Interrupts
If SPORT interrupts are enabled, it is important to note that the
active signals on the frame sync pins do not necessarily corre-
spond with the positions in time of where SPORT interrupts are
generated.
On ADSP-21xx processors, it is necessary to enable SPORT
interrupts and use Interrupt Service Routines (ISRs) to handle
Tx/Rx activity, while on the TMS320C5x processors it is pos-
sible to poll the status of the Rx and Tx registers, which means
that Rx/Tx activity can be monitored using a single ISR that
would ideally be the Tx ISR as the Tx interrupt will typically
occur before the Rx ISR.
APPLICATIONS EXAMPLES
Vector Motor Control
The current drawn by a motor can be split into two compo-
nents: one produces torque and the other produces magnetic
flux. For optimal performance of the motor, these two compo-
nents should be controlled independently. In conventional
methods of controlling a three-phase motor, the current (or
voltage) supplied to the motor and the frequency of the drive are
the basic control variables. However, both the torque and flux
are functions of current (or voltage) and frequency. This cou-
pling effect can reduce the performance of the motor because,
for example, if the torque is increased by increasing the fre-
quency, the flux tends to decrease.
Vector control of an ac motor involves controlling phase in
addition to drive and current frequency. Controlling the phase
of the motor requires feedback information on the position of
the rotor relative to the rotating magnetic field in the motor.
Using this information, a vector controller mathematically trans-
forms the three-phase drive currents into separate torque and
flux components. The AD73360, with its six-channel simulta-
neous sampling capability, is ideally suited for use in vector
motor control applications.
A block diagram of a vector motor control application using the
AD73360 is shown in Figure 30. The position of the field is
derived by determining the current in each phase of the motor.
V
IN1
, V
IN2
and V
IN3
of the AD73360 are used to digitize this
information.
Simultaneous sampling is critical to maintain the relative phase
information between the channels. A current-sensing isolation
amplifier, transformer or Hall-effect sensor is used between the
motor and the AD73360. Rotor information is obtained by
measuring the voltage from the three inputs to the motor. V
IN4
,
V
IN5
and V
IN6
of the AD73360 are used to obtain this informa-
tion. A DSP microprocessor is used to perform the mathematical
transformations and control loop calculations on the informa-
tion fed back by the AD73360.
DAC
DRIVE
CIRCUITRY
TORQUE
SETPOINT
FLUX
SETPOINT
THREE-
PHASE
MOTOR
I
C
I
B
I
A
ISOLATION
AMPLIFIERS
V
C
V
B
V
A
VOLTAGE
ATTENUATORS
DSP
MICROPROCESSOR
TORQUE & FLUX
CONTROL LOOP
CALCULATIONS
DAC
DAC
AD73360
V
IN1
V
IN2
V
IN3
V
IN4
V
IN6
V
IN5
TRANSFORMATION
TO TORQUE &
FLUX
CURRENT
COMPONENTS
Figure 30. Vector Motor Control Using the AD73360
Industrial Power Metering
The AD73360 can be used to measure the voltage and current
in all three phases of a three-phase supply. The simultaneous
sampling architecture of the AD73360 is ideal for this applica-
tion where simultaneous sampling is critical to maintaining the
relative phase information between the three voltage and three
current phases. Figure 31 shows a block diagram of a three-
phase metering system. The V
IN1
, V
IN2
and V
IN3
channels are
used to measure the voltages in each phase (via voltage attenua-
tors). The current flowing in each phase can be detected by the
use of current-sensing isolation amplifiers, transformers or
Hall-effect sensors. V
IN4
, V
IN5
and V
IN6
are used to digitize
this information. A DSP microprocessor is used to perform
the mathematical calculations on the information provided by
the AD73360.
DSP
MICROPROCESSOR
ISOLATION
AMPLIFIERS
VOLTAGE
ATTENUATORS
3
2
1
THREE-
PHASE
SUPPLY
I
C
I
B
I
A
V
C
V
B
V
A
AD73360
V
IN1
V
IN2
V
IN3
V
IN4
V
IN6
V
IN5
Figure 31. Three-Phase Power Metering
REV. B
AD73360
28
Programming a Single AD73360 for Data Mode Operation
This section describes a typical sequence in programming a
single AD73360 to operate in normal Data Mode. It details the
control (program) words that are sent to the device to configure
its internal registers and shows the typical output data received
during both Program and Data Modes. The device is connected
in Frame Sync Loop-Back Mode (see Figure 13), which forces
an input word from the DSPs Tx register each time the AD73360
outputs a word via the SDO/SDOFS lines (while the AD73360
is in Program Mode the data transmitted will be invalid ADC
data and will, in fact, be a modified version of the last control
word written in by the DSP). In each case the DSPs Tx register
is preloaded with the data before the frame pulse is received. In
Step 1, the part has just been reset and on the first output event
the AD73360 presents an invalid output word
1
. The DSPs Tx
register contains a control word that programs CRB with the
data byte 0x03. This sets the sample rate at 8 kHz (with a
APPENDIX A
master clock of 16.384 MHz). In Step 2, the control word in
the DSPs Tx register will cause all the AD73360s channels to
power up. This data is received by the AD73360 with the next
frame sync pulse. An invalid ADC word is also received at the
DSPs Rx register. Step 3 selects the settings for each channel
of the AD73360. This set can be repeated as necessary to pro-
gram all the channels to the desired settings. Steps 4 and 5
program the modes of each channel (i.e., single-ended or differ-
ential mode and normal or inverted). Step 6 puts the AD73360
into Data Mode and in Step 7 the first valid ADC word is
received.
NOTE
1
This sequence assumes that the DSP SPORTs Rx and Tx interrupts are
enabled. It is important to ensure there is no latency (separation) between
control words in a cascade configuration. This is especially the case when
programming Control Register B, as it contains settings for SCLK and
DMCLK rates.
DSP Tx REG
CONTROL WORD
1000 0001 0000 0011
DEVICE 1
ADC WORD 1*
0000 0000 0000 0000
DSP Rx REG
0000 0000 0000 0000
STEP 1
DON'T CARE
DSP Tx REG
CONTROL WORD
1000 0010 0000 0001
DEVICE 1
ADC WORD 1*
1011 1111 0000 0011
DSP Rx REG
1011 1111 0000 0011
STEP 2
DON'T CARE
DSP Tx REG
CONTROL WORD
1000 0011 1000 1111
DEVICE 1
ADC WORD 1*
1011 1010 0000 0001
DSP Rx REG
1011 1010 0000 0001
STEP 3
DON'T CARE
DSP Tx REG
CONTROL WORD
1000 0110 0011 1111
DEVICE 1
ADC WORD 1*
1011 1011 1000 1111
DSP Rx REG
1011 1011 1000 1111
STEP 4
DON'T CARE
DSP Tx REG
CONTROL WORD
1000 0111 0011 1111
DEVICE 1
ADC WORD 1*
1011 1111 0011 1111
DSP Rx REG
1011 1110 0011 1111
STEP 5
DON'T CARE
DSP Tx REG
CONTROL WORD
1000 0000 0000 0001
DEVICE 1
ADC WORD 1*
1011 1111 0011 1111
DSP Rx REG
1011 1111 0011 1111
STEP 6
DON'T CARE
DSP Tx REG
CONTROL WORD
0111 1111 1111 1111
DEVICE 1
ADC WORD 1
1000 0000 0000 0000
DSP Rx REG
1000 0000 0000 0000
STEP 7
ADC WORD 1
SET 8kHz SAMPLING
GLOBAL POWER-UP
SET CHANNEL GAINS
SET CHANNEL MODE
SET CHANNEL INVERSION
SET DATA MODE
RECEIVE VALID ADC DATA
*ADC DATA RECEIVED BY THE DSP DURING THE PROGRAMMING PHASE SHOULD NOT BE CONSIDERED VALID RESULTS
Figure 32. Programming a Single AD73360 for Operation in Data Mode
REV. B
AD73360
29
APPENDIX B
Programming a Single AD73360 for Mixed Mode Operation
This section describes a typical sequence in programming a
single AD73360 to operate in Mixed Mode. The device is con-
figured in Nonframe Sync Loop-Back (see Figure 14), which
allows the DSPs Tx Register to determine how many words are
sent to the device during one sample interval. In Nonframe
Sync Loop-Back mode care must be taken when writing to the
AD73360 that an ADC result or register read result contained
in the devices serial register is not corrupted by a write. The
best way to avoid this is to only write control words when the
AD73360 has no more data to send. This can limit the number
of times a DSP can write to the AD73360 and is dependant on
the SCLK speed and the number of channels powered up. In
this example it is assumed that there are only two channels
powered up and that there is adequate time to transmit data
after the ADC results have been read.
In Step 1, the device has just been reset and the on first output
event the AD73360 presents an invalid ADC sample word
1
.
Once this word has been received the DSP can begin transmit-
ting programming information to the AD73360. The first con-
trol word sets the sampling rate at 8 kHz. In Step 2, the DSP
instructs the AD73360 to power up channels 1 and 2 and sets
the gain of each. No data is read from the AD73360 at this
point. Steps 3 and 4 set the reference and places the part into
Mixed Mode. In Steps 5 and 6 valid ADC results are read from
the AD73360 and in Step 7 the DSP sends an instruction to the
AD73360 to change the gain of Channel 1.
NOTE
1
This sequence assumes that the DSP SPORTs Rx and Tx interrupts are
enabled. It is important to ensure there is no latency (separation) between
control words in a cascade configuration. This is especially the case when
programming Control Register B, as it contains settings for SCLK and
DMCLK rates.
DSP Tx REG
CONTROL WORD
1000 0001 0000 0011
DEVICE 1
ADC WORD 1*
0000 0000 0000 0000
DSP Rx REG
0000 0000 0000 0000
STEP 1
DON'T CARE
DSP Tx REG
CONTROL WORD
1000 0011 1111 1010
DEVICE 1
ADC WORD 1*
1011 1001 0000 0011
DSP Rx REG
0000 0000 0000 0000
STEP 2
DON'T CARE
DSP Tx REG
CONTROL WORD
1000 0010 1110 0000
DEVICE 1
ADC WORD 1*
1011 1011 1111 1010
DSP Rx REG
0000 0000 0000 0000
STEP 3
DON'T CARE
DSP Tx REG
CONTROL WORD
1000 0000 0000 0010
DEVICE 1
ADC WORD 1*
1011 1010 1110 0000
DSP Rx REG
0000 0000 0000 0000
STEP 4
DON'T CARE
DSP Tx REG
CONTROL WORD
0111 1111 1111 1111
DEVICE 1
ADC WORD 1
1000 0000 0000 0000
DSP Rx REG
1000 0000 0000 0000
STEP 5
ADC WORD 1
DSP Tx REG
CONTROL WORD
0111 1111 1111 1111
DEVICE 1
ADC WORD 2
1111 0000 0000 0000
DSP Rx REG
1111 0000 0000 0000
STEP 6
ADC WORD 2
DSP Tx REG
CONTROL WORD
1000 0011 1000 0010
DEVICE 1
INVALID DATA
xxxx xxxx xxxx xxxx
DSP Rx REG
1111 0000 0000 0000
STEP 7
ADC WORD 2
SET 8kHz SAMPLING
POWER UP CHANNEL 1&2 AND SET GAINS
POWER UP REFERENCE
SET MIXED MODE
CHANGE GAIN ON CHANNEL 1
RECEIVE VALID ADC DATA
RECEIVE VALID ADC DATA
*ADC DATA RECEIVED BY THE DSP DURING THE PROGRAMMING PHASE SHOULD NOT BE CONSIDERED VALID RESULTS
Figure 33. Programming a Single AD73360 for Operation in Mixed Mode

AD73360ARZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Front End - AFE IC 6-CH AFE Processor
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union