REV. B –3
AD73360
AD73360A
Parameter Min Typ Max Unit Test Conditions/Comments
LOGIC INPUTS
V
INH
, Input High Voltage V
DD
0.8 V
DD
V
V
INL
, Input Low Voltage 0 0.8 V
I
IH
, Input Current 10 µA
C
IN
, Input Capacitance 10 pF
LOGIC OUTPUTS
V
OH
, Output High Voltage V
DD
0.4 V
DD
V |IOUT| 100 µA
V
OL
, Output Low Voltage 0 0.4 V |IOUT| 100 µA
Three-State Leakage Current 10 +10 µA
POWER SUPPLIES
AVDD1, AVDD2 2.7 3.3 V
DVDD 2.7 3.3 V
I
DD
8
See Table I
NOTES
1
Operating temperature range is as follows: 40°C to +85°C. Therefore, T
MIN
= 40°C and T
MAX
= +85° C.
2
Test conditions: Input PGA set for 0 dB gain (unless otherwise noted).
3
At input to sigma-delta modulator of ADC.
4
Guaranteed by design.
5
Overall group delay will be affected by the sample rate and the external digital filtering.
6
The ADCs input impedance is inversely proportional to DMCLK and is approximated by: (4 × 10
11
)/DMCLK.
7
Frequency response of ADC measured with input at audio reference level (the input level that produces an output level of 10 dBm0), with 38 dB preamplifier
bypassed and input gain of 0 dB.
8
Test Conditions: no load on digital inputs, analog inputs ac coupled to ground.
Specifications subject to change without notice.
Table I. Current Summary (AVDD = DVDD = 3.3 V)
Total
Analog Digital Current MCLK
Conditions Current Current (Max) SE ON Comments
ADCs Only On 12 10 26.5 1 YES REFOUT Disabled
REFCAP Only On 0.75 0.04 1.0 0 NO REFOUT Disabled
REFCAP and
REFOUT Only On 3.3 0.04 4.5 0 NO
All Sections Off 0.01 1.2 1.5 0 YES MCLK Active Levels Equal to 0 V and DVDD
All Sections Off 0.01 0.03 0.1 0 NO Digital Inputs Static and Equal to 0 V or DVDD
The above values are in mA and are typical values unless otherwise noted. MCLK = 16.384 MHz; SCLK = 16.384 MHz.
REV. B
–4–
AD73360–SPECIFICATIONS
1
(AVDD = 5 V 10%; DVDD = 5 V 10%; DGND = AGND = 0 V, f
MCLK
= 16.384 MHz,
f
SCLK
= 8.192 MHz, f
S
= 8 kHz; T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
AD73360A
Parameter Min Typ Max Unit Test Conditions/Comments
REFERENCE
REFCAP
Absolute Voltage, V
REFCAP
1.25 V 5VEN = 0
2.5 V 5VEN = 1
REFCAP TC 50 ppm/°C 0.1 µF Capacitor Required from REFCAP
to AGND2
REFOUT
Typical Output Impedance 130
Absolute Voltage, V
REFOUT
1.25 V 5VEN = 0, Unloaded
2.5 V 5VEN = 1, Unloaded
Minimum Load Resistance 2 k 5VEN = 1
Maximum Load Capacitance 100 pF
ADC SPECIFICATIONS
Maximum Input Range at VIN
2, 3
3.2875 V p-p 5VEN = 1, Measured Differentially
3.17 dBm
Nominal Reference Level at VIN 2.2823 V p-p 5VEN = 1, Measured Differentially
(0 dBm0) 0 dBm
Absolute Gain
PGA = 0 dB 0.1 dB 1.0 kHz
PGA = 38 dB 0.5 dB 1.0 kHz
Gain Tracking Error ± 0.1 dB 1.0 kHz, +3 dBm0 to 50 dBm0
Signal to (Noise + Distortion)
PGA = 0 dB 76 dB 0 Hz to 4 kHz; f
S
= 8 kHz
PGA = 38 dB 70 dB 0 Hz to 4 kHz; f
S
= 64 kHz
Total Harmonic Distortion
PGA = 0 dB 86 dB
PGA = 38 dB 80 dB
Intermodulation Distortion 79 dB PGA = 0 dB
Idle Channel Noise 76 dB PGA = 0 dB
Crosstalk ADC-to-ADC 85 dB ADC1 Input Signal Level: 1.0 kHz, 0 dBm0
ADC2 Input at Idle
DC Offset 20 mV PGA = 0 dB
Power Supply Rejection 55 dB Input Signal Level at AVDD and DVDD
Pins 1.0 kHz, 100 mV p-p Sine Wave
Group Delay
4, 5
25 µs 64 kHz Output Sample Rate
50 µs 32 kHz Output Sample Rate
95 µs 16 kHz Output Sample Rate
190 µs 8 kHz Output Sample Rate
Input Resistance at VIN
2, 4
25 k
6
DMCLK = 16.384 MHz
FREQUENCY RESPONSE
(ADC)
7
Typical Output
Frequency (Normalized to f
S
)
00dB
0.03125 0.1 dB
0.0625 0.25 dB
0.125 0.6 dB
0.1875 1.4 dB
0.25 2.8 dB
0.3125 4.5 dB
0.375 7.0 dB
0.4375 9.5 dB
> 0.5 < 12.5 dB
REV. B –5
AD73360
AD73360A
Parameter Min Typ Max Unit Test Conditions/Comments
LOGIC INPUTS
V
INH
, Input High Voltage V
DD
0.8 V
DD
V
V
INL
, Input Low Voltage 0 0.8 V
I
IH
, Input Current 0.5 µA
C
IN
, Input Capacitance 10 pF
LOGIC OUTPUTS
V
OH
, Output High Voltage V
DD
0.4 V
DD
V |IOUT| 100 µA
V
OL
, Output Low Voltage 0 0.4 V |IOUT| 100 µA
Three-State Leakage Current 0.3 µA
POWER SUPPLIES
AVDD1, AVDD2 4.5 5.5 V
DVDD 4.5 5.5 V
I
DD
8
See Table II
NOTES
1
Operating temperature range is as follows: 40°C to +85°C. Therefore, T
MIN
= 40°C and T
MAX
= +85°C.
2
Test conditions: Input PGA set for 0 dB gain (unless otherwise noted).
3
At input to sigma-delta modulator of ADC.
4
Guaranteed by design.
5
Overall group delay will be affected by the sample rate and the external digital filtering.
6
The ADCs input impedance is inversely proportional to DMCLK and is approximated by: (4 × 10
11
)/DMCLK.
7
Frequency response of ADC measured with input at audio reference level (the input level that produces an output level of 10 dBm0), with 38 dB preamplifier
bypassed and input gain of 0 dB.
8
Test Conditions: no load on digital inputs, analog inputs ac coupled to ground.
Specifications subject to change without notice.
Table II. Current Summary (AVDD = DVDD = 5.5 V)
Total
Analog Digital Current MCLK
Conditions Current Current (Typ) SE ON Comments
ADCs Only On 16 16 32 1 YES REFOUT Disabled
REFCAP Only On 0.8 0 0.8 0 NO REFOUT Disabled
REFCAP and
REFOUT Only On 3.5 0 3.5 0 NO
All Sections Off 0.1 1.9 2.0 0 YES MCLK Active Levels Equal to 0 V and DVDD
All Sections Off 0 0.05 0.06 0 NO Digital Inputs Static and Equal to 0 V or DVDD
The above values are in mA and are typical values unless otherwise noted.
Table III. Signal Ranges
3 V Power Supply 5 V Power Supply
5VEN = 0 5VEN = 0 5VEN = 1
V
REFCAP
1.25 V ± 10% 1.25 V 2.5 V
V
REFOUT
1.25 V ± 10% 1.25 V 2.5 V
ADC
Maximum Input Range at V
IN
1.64375 V p-p 1.64375 V p-p 3.2875 V p-p
Nominal Reference Level 1.1413 V p-p 1.1413 V p-p 2.2823 V p-p

AD73360ARZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog Front End - AFE IC 6-CH AFE Processor
Lifecycle:
New from this manufacturer.
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