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AD73360ARZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36
REV. B
AD73360
–6–
TIMING CHARACTERISTICS
Limit at
Parameter T
A
= –40ⴗC to +85ⴗC Unit Description
Clock Signals See Figure 1
t
1
61 ns min MCLK Period
t
2
24.4 ns min MCLK Width High
t
3
24.4 ns min MCLK Width Low
Serial Port See Figures 3 and 4
t
4
t
1
ns min SCLK Period
t
5
0.4 × t
1
ns min SCLK Width High
t
6
0.4 × t
1
ns min SCLK Width Low
t
7
20 ns min SDI/SDIFS Setup Before SCLK Low
t
8
0 ns min SDI/SDIFS Hold After SCLK Low
t
9
10 ns max SDOFS Delay from SCLK High
t
10
10 ns min SDOFS Hold After SCLK High
t
11
10 ns min SDO Hold After SCLK High
t
12
10 ns max SDO Delay from SCLK High
t
13
30 ns max SCLK Delay from MCLK
(AVDD = 3 V ⴞ 10%; DVDD = 3 V ⴞ 10%; AGND = DGND = 0 V; T
A
= T
MlN
to T
MAX
, unless otherwise
noted)
TIMING CHARACTERISTICS
Limit at
Parameter T
A
= –40ⴗC to +85ⴗC Unit Description
Clock Signals See Figure 1
t
1
61 ns min MCLK Period
t
2
24.4 ns min MCLK Width High
t
3
24.4 ns min MCLK Width Low
Serial Port See Figures 3 and 4
t
4
t
1
ns min SCLK Period
t
5
0.4 × t
1
ns min SCLK Width High
t
6
0.4 × t
1
ns min SCLK Width Low
t
7
20 ns min SDI/SDIFS Setup Before SCLK Low
t
8
0 ns min SDI/SDIFS Hold After SCLK Low
t
9
10 ns max SDOFS Delay from SCLK High
t
10
10 ns min SDOFS Hold After SCLK High
t
11
10 ns min SDO Hold After SCLK High
t
12
10 ns max SDO Delay from SCLK High
t
13
30 ns max SCLK Delay from MCLK
(AVDD = 5 V ⴞ 10%; DVDD = 5 V ⴞ 10%; AGND = DGND = 0 V; T
A
= T
MlN
to T
MAX
, unless otherwise
noted)
REV. B
AD73360
–7–
t
3
t
2
t
1
Figure 1. MCLK Timing
TO OUTPUT
PIN
+2.1V
100␮A
100␮A
I
OL
I
OH
C
L
15pF
Figure 2. Load Circuit for Timing Specifications
t
3
t
1
t
2
t
13
* SCLK IS INDIVIDUALLY PROGRAMMABLE
IN FREQUENCY (MCLK/4 SHOWN HERE).
t
4
t
5
t
6
MCLK
SCLK*
Figure 3. SCLK Timing
t
11
t
7
t
9
t
10
t
12
t
7
t
8
SE (I)
SCLK (O)
SDIFS (I)
SDI (I)
SDOFS (O)
SDO (O)
THREE-
STATE
THREE-
STATE
THREE-
STATE
D15 D2 D1 D0 D14
D15D1D14D15
D15
t
8
D0
Figure 4. Serial Port (SPORT)
V
IN
– dBm0
–85 5–75 –65 –55 –45 –35 –25 –15 –5
80
70
–10
S/(N+D) – dB
30
20
10
0
50
40
60
3.17
Figure 5a. S/(N+D) vs. V
IN
(ADC @ 3 V) Over Voiceband
Bandwidth (300 Hz–3.4 kHz)
V
IN
– dBm0
–85 5–75 –65 –55 –45 –35 –25 –15 –5
80
70
–10
S/(N+D) – dB
30
20
10
0
50
40
60
3.17
Figure 5b. S/(N+D) vs. V
IN
(ADC @ 5 V) Over Voiceband
Bandwidth (300 Hz–3.4 kHz)
REV. B
AD73360
–8–
ABSOLUTE MAXIMUM RATINGS*
(T
A
= +25°C unless otherwise noted)
AVDD, DVDD to GND . . . . . . . . . . . . . . . . . –0.3 V to +7 V
AGND to DGND . . . . . . . . . . . . . . . . . . . . . –0.3 V to +0.3 V
Digital I/O Voltage to DGND . . . . . . –0.3 V to DVDD + 0.3 V
Analog I/O Voltage to AGND . . . . . –0.3 V to AVDD + 0.3 V
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . . . . . . –40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . +150°C
SOIC, θ
JA
Thermal Impedance . . . . . . . . . . . . . . . . . . 75°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD73360 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
PIN CONFIGURATIONS
RW-28 SU-44
TOP VIEW
(Not to Scale)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AD73360
SDO
MCLK
SCLK
RESET
DVDD
DGND
AGND2
VINP2
VINN2
VINP1
VINN1
AVDD2
REFCAP
REFOUT
SDOFS
SDIFS
SDI
SE
AGND1
AVDD1
VINP6
VINN3
VINP3
VINN4
VINP4
VINN6
VINP5
VINN5
3
4
5
6
7
1
2
10
11
8
9
40 39 38414243 43536344 37
12
13
14 15 16 17 18 19
20
21 22
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
29
30
31
32
33
27
28
25
26
23
24
NC
VINN5
VINP5
NC
VINN6
VINP6
NC
REFOUT
REFCAP
AVDD2
AVDD2
AGND2
AGND2
AGND2
NC = NO CONNECT
AGND2
DGND
DGND
DVDD
AVDD1
SDI
NC
AVDD1
SDIFS
AGND1
AGND1
NC
VINN1
NC
RESET
VINN2
VINP3
VINN4
VINP4
NC
VINP2
SCLK
MCLK
SDO
VINP1
NC
SDOFS
VINN3
SE
NC
AD73360
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36

AD73360ARZ

Mfr. #:
Buy AD73360ARZ
Manufacturer:
Analog Devices Inc.
Description:
Analog Front End - AFE IC 6-CH AFE Processor
Lifecycle:
New from this manufacturer.
Delivery:
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