Functional description ST7540
34/44
Function Value Selection Note Default
Bit 13 Bit 12
12 to 13
Detection
method
Preamble detection
without conditioning
00
Preamble detection
notification on CD_PD Line
CLR/T and RxD signal always
present In UART Mode
(UART/SPI pin set to 1) this
configuration is not allowed.
Carrier
detection
without
conditioning
Preamble detection
with conditioning
01
Preamble Detection
notification on CD_PD Line.
CLR/T and RxD line are
forced to "0" when Preamble
has not been detected or PLL
is in Unlock condition. In
UART Mode (UART/SPI pin
set to 1) this configuration is
not allowed.
Carrier detection
without conditioning
10
Carrier detection notification
on CD_PD Line
CLR/T and RxD signal always
present
Carrier detection
with conditioning
11
Carrier detection notification
on CD_PD Line
CLR/T Line is forced to “0”
and RxD Line is forced to “0”
or “1” (according the
UART/SPI pin level) when
carrier is not detected
Bit 14
14
Mains
Interfacing
Mode
Synchronous
Asynchronous
0
1
Asynchronous
Bit 16 Bit 15
15 to 16 Output Clock
16 MHz
8 MHz
4 MHz
Clock OFF
0
0
1
1
0
1
0
1
4 MHz
Bit 17
Active only if extended control
register is enable (Bit 21=”1”)
17
Output
Voltage Level
Freeze
Enabled
Disabled
0
1
Disabled
Bit 18
Active only if extended control
register is enable (Bit 21=”1”)
18
Header
Recognition
Disabled
Enabled
0
1
Disabled
Bit 19 Active only if header
recognition function (Bit
18=”1”) and extended control
register (Bit 21=”1”)
are enable
19
Frame Length
Count
Disabled
Enabled
0
1
Disabled
Table 12. Control register functions
ST7540 Functional description
35/44
Function Value Selection Note Default
Bit 20
Active only if Extended
Control Register is enable (Bit
21=”1”)
20
Header
Length
8 bits
16 bits
0
1
16 bits
Bit 21
Extended Register enables
Functions on Bit 17, 18,19 and
20
21
Extended
Register
Disable (24 bits)
Enabled (48 bits)
0
1
Disabled
(24 bits)
Bit 22
22
Sensitivity
Mode
Normal Sensitivity
High Sensitivity
0
1
Normal
Bit 23
23 Input Filter
Disabled
Enabled
0
1
Disabled
24 to 39
Frame
Header
from 0000h to
FFFFh
One 16 bits Header or two 8
bits Headers (MSB first)
depending on Bit 20
9B58h
40 to 47 Frame Length from 01h to FFh
Number of 16 bits words
expected
08h
Table 12. Control register functions
Auxiliary analog and digital functions ST7540
36/44
7 Auxiliary analog and digital functions
7.1 Band in use
The Band in Use Block has a Carrier Detection like function but with a different Input
Sensitivity (83.5 dBµV Typ.) and with a different BandPass filter Selectivity (40dB/Dec).
BU/THERM line is forced High when a signal in band is detected.
To prevent BU/THERM line false transition, Band in Use signal is conditioned to Carrier
Detection Internal Signal. This function is enabled only in Receiving mode (in Transmission
mode the BU/THERM pin is used for Thermal shutdown signaling, see Section 7.8: Thermal
shutdown).
7.2 Time out
Time Out Function is a protection against a too long data transmission. When Time Out
function is enabled after 1 or 3 second of continuos transmission the transceiver is forced in
receiving mode. This function allows ST7540 to automatically manage the CENELEC
Medium Access specification. When a time-out event occur, the transmission section is
disabled for at least 125 ms. To Unlock the Time Out condition RxTx should be forced High.
During the time out period only register access or reception mode are enabled.
During Reset sequence if RxTx line =”0” & REG_DATA line =”0”, Time Out protection is
suddenly enabled and ST7540 must be configured in data reception after the reset event
before starting a new data transmission.
Time Out time is programmable using Control Register bits 7 and 8 (Ta bl e 1 2 ).
Figure 22. Time-out timing and unlock sequence
T
OUT
T
OFF
T
OFFD
RxTx
Time Out function
D03IN1409

ST7540

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Network Controller & Processor ICs FSK powerline transceiver
Lifecycle:
New from this manufacturer.
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