ST7540 Datasheet ST7540, ST7540TR | P37-P39

ST7540 Auxiliary analog and digital functions

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7.3 Reset & watchdog

RSTO Output is a reset generator for the application circuitry. During the ST7540 startup

sequence is forced low. RSTO becomes high after a T

RSTO

delay from the end of oscillator

startup sequence.

Inside ST7540 is also embedded a watchdog function. The watchdog function is used to

detect the occurrence of a software fault of the Host Controller. The watchdog circuitry

generates an internal and external reset (RSTO low for T

RSTO

time) on expiry of the internal

watchdog timer. The watchdog timer reset can be achieved applying a negative pulse on

WD pin (see Figure 23).

Figure 23. Reset and Watchdog Timing

7.4 Output clock

MCLK is the master clock output. The clock frequency sourced can be programmed through

the Control Register to be a ratio of the crystal oscillator frequency (Fosc, Fosc/2 Fosc/4).

The transition between one frequency and another is done only at the end of the ongoing

cycle. The oscillator can be disabled using Control Register bits 15 and 16 (Tabl e 1 2).

7.5 Output voltage level freeze

The Output Level Freeze function, when enabled, turns off the Voltage Control Loop once

the ALC stays in a stable condition for about 3 periods of control loop, and maintains a

constant gain until the end of transmission. Output Level Freeze can be enabled using

Control Register bit 17 (Ta bl e 1 2). This function is available only using the Extended Control

7.6 Extended control register

When Extended Control Register function is enabled, all the 48 bits of Control Register are

programmable. Otherwise, only the first 24 bits of Control Register are programmable. The

functions Header Recognition, Frame Bit Count and Output Voltage Freeze are available

only if Extended Control Register function is enabled. Extended Control Register can be

enabled using Control Register bit 21(Tabl e 1 2 ).

RSTO

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Auxiliary analog and digital functions ST7540

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7.7 Under voltage lock out

The UVLO function turns off the device if the V

voltage falls under 4V. Hysteresis is

340mV typically.

7.8 Thermal shutdown

The ST7540 is provided of a thermal protection which turn off the PLI when the junction

temperature exceeds 170°C ±10% . Hysteresis is around 30°C.

When shutdown threshold is overcome, PLI interface is switched OFF.

Thermal Shutdown event is notified to the HOST controller using BU/THERM line. When

BU/THERM line is High, ST7540 junction temperature exceed the shutdown threshold (Not

Latched). This function is enabled only in Transmission mode (in Receiving mode the

BU/THERM pin is used for Band in Use signaling, see Band in Use function Section 7.1:

Band in use).

7.9 5V Voltage regulator

ST7540 has an embedded 5V linear regulator externally available (on pin VDC) to supply

the application circuitry. The 5V linear regulator has a very low quiescent current (50µA) and

a current capability of 50mA. The regulator is protected against short circuitry events.

7.10 3.3V Voltage regulator

The V

pin can act either as 3.3V Voltage Output or as Input Digital Supply. When the V

pin is externally forced to 5V all the Digital I/Os operate at 5V, otherwise all the Digital I/Os

are internally supplied at 3.3V. The V

pin can also source 3.3V voltage to supply external

components. The 3.3V linear regulator has a very low quiescent current (50µA) and a

current capability of 50mA. The regulator is protected against short circuitry events.

7.11 Power-up procedure

To ensure ST7540 proper power-Up sequence, V

and V

Supply has to fulfil the

following rules:

1. V

rising slope must not exceed 100V/ms.

2. When V

is below 5V/3.3V: V

-V

< 1.2V.

When V

supply is connected to VDC (5V Digital Supply) the above mentioned relation

can be ignored if VDC load < 50mA and if the filtering capacitor on VDC < 100uF.

If V

is not forced to 5V, the Digital I/Os are internally supplied at 3.3 V and if V

load <

50mA and the filtering capacitor on V

< 100uF the second relation can be ignored .

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Figure 24. Power-up sequence

Voltage

Time

5V/3.3V

-V

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ST7540

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