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ADV7173KSTZ-REEL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60
REV. B
ADV7172/ADV7173
–7–
3.3 V TIMING SPECIFICATIONS
(V
AA
= 3.0 V–3.6 V
1
, V
REF
= 1.235 V, R
SET1,2
= 600 . All specifications T
MIN
to T
MAX
2
unless
otherwise noted.)
Parameter Conditions Min Typ Max Unit
MPU PORT
3, 4
SCLOCK Frequency 0 400 kHz
SCLOCK High Pulsewidth, t
1
0.6 µs
SCLOCK Low Pulsewidth, t
2
1.3 µs
Hold Time (Start Condition), t
3
After this period the 1st clock is generated 0.6 µs
Setup Time (Start Condition), t
4
relevant for repeated Start Condition. 0.6 µs
Data Setup Time, t
5
100 ns
SDATA, SCLOCK Rise Time, t
6
300 ns
SDATA, SCLOCK Fall Time, t
7
300 ns
Setup Time (Stop Condition), t
8
0.6 µs
ANALOG OUTPUTS
3, 5
Analog Output Delay 7ns
DAC Analog Output Skew 0 ns
CLOCK CONTROL AND
PIXEL PORT
4, 5, 6
f
CLOCK
27 MHz
Clock High Time, t
9
8ns
Clock Low Time, t
10
8ns
Data Setup Time, t
11
4.0 ns
Data Hold Time, t
12
5ns
Control Setup Time, t
11
5ns
Control Hold Time, t
12
3ns
Digital Output Access Time, t
13
20 ns
Digital Output Hold Time, t
14
12 ns
Pipeline Delay, t
15
37 Clock Cycles
TELETEXT PORT
3, 4, 7
Digital Output Access Time, t
16
23 ns
Data Setup Time, t
17
2ns
Data Hold Time, t
18
6ns
RESET CONTROL
3, 4
RESET Low Time 3ns
NOTES
1
The max/min specifications are guaranteed over this range. The max/min values are typical over 3.0 V to 3.6 V.
2
Temperature range T
MIN
to T
MAX
: 0°C to 70°C.
3
TTL input values are 0 to 3 volts, with input rise/fall times ≤ 3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and
outputs. Analog output load ≤ 10 pF.
4
Guaranteed by characterization.
5
Output delay measured from the 50% point of the rising edge of CLOCK to the 50% point of full-scale transition.
6
Pixel Port consists of the following:
Pixel Inputs: P7–P0
Pixel Controls: HSYNC, FIELD/VSYNC, BLANK, VSO, CSO_HSO, CLAMP
Clock Input: CLOCK
7
Teletext Port consists of the following:
Teletext Output: TTXREQ
Teletext Input: TTX
Specifications subject to change without notice.
REV. B
ADV7172/ADV7173
–8–
t
3
t
2
t
6
t
1
t
7
t
5
t
3
t
4 t
8
SDATA
SCLOCK
Figure 1. MPU Port Timing Diagram
t
9
t
11
CLOCK
PIXEL INPUT
DATA
t
10
t
12
HSYNC,
FIELD/VSYNC,
BLANK
Cb Y Cr Y Cb Y
HSYNC,
FIELD/VSYNC,
BLANK,
CSO_HSO,
VSO, CLAMP
t
13
t
14
CONTROL
I/PS
CONTROL
O/PS
Figure 2. Pixel and Control Data Timing Diagram
t
16
t
17
TTXREQ
CLOCK
TTX
4 CLOCK
CYCLES
4 CLOCK
CYCLES
4 CLOCK
CYCLES
3 CLOCK
CYCLES
4 CLOCK
CYCLES
t
18
Figure 3. Teletext Timing Diagram
DAC Average Current Consumption
DAC D, E, F: The average current consumed by each DAC is the DAC output current as determined by R
SET2
/V
REF
(see Appendix 8).
DAC A, B, C: In normal power mode the average current consumed by each DAC is the DAC output current as determined by R
SET1
(see Appendix 8).
In Low Power Mode the average current consumed by each DAC is approximately half the DAC output current as determined by R
SET1.
Consult AN-551 for detailed information on ADV7172/ADV7173 power management.
REV. B
ADV7172/ADV7173
–9–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADV7172/ADV7173 features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high-energy electrostatic discharges. Therefore,
proper ESD precautions are recommended to avoid performance degradation or loss of
functionality.
WARNING!
ESD SENSITIVE DEVICE
ABSOLUTE MAXIMUM RATINGS
1
V
AA
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Voltage on Any Digital Input Pin . GND – 0.5 V to V
AA
+ 0.5 V
Storage Temperature (T
S
) . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature (T
J
) . . . . . . . . . . . . . . . . . . . . . . 150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . . 260°C
Analog Outputs to GND
2
. . . . . . . . . . . GND – 0.5 V to V
AA
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent
damage to the device. This is a stress rating only; functional operation of the device
at these or any other conditions above those listed in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
2
Analog output short circuit to any power supply or common can be of an
indefinite duration.
PACKAGE THERMAL PERFORMANCE
The 48-lead LQFP package is used for this device. The junc-
tion-to-ambient (θ
JA
) thermal resistance in still air on a four
layer PCB is 54.6°C/W. The junction-to-case thermal resistance
(θ
JC
) is 16.7°C.
To reduce power consumption when using this part the user is
advised to run the part on a 3.3 V supply, turn off any unused
DACs. However, if 5 V operation is required the user can enable
Low Power mode by setting MR16 to a Logic 1. Another alter-
native way to further reduce power is to use external buffers that
dramatically reduce the DAC currents, the current can be low-
ered to as low as 5 mA (see AN-551 and Appendix 8 for more
details) from a nominal value of 36 mA.
The user must at all times stay below the maximum junction
temperature of 110°C. The following equation shows how to
calculate this junction temperature:
J
unction Temperature = [V
AA
(I
DAC
+ I
CCT
) × θ
JA
] 70°C
where
I
DAC
= 10 mA + (sum of the average currents consumed by each
powered-on DAC).
PIN CONFIGURATION
36
35
34
33
32
31
30
29
28
27
26
25
13 14 15 16 17 18 19 20 21 22 23 24
1
2
3
4
5
6
7
8
9
10
11
12
48 47 46 45 44 39 38 3743 42 41 40
PIN 1
IDENTIFIER
TOP VIEW
(Not to Scale)
ALSB
HSYNC
FIELD/VSYNC
BLANK
GND
V
AA
P0
P1
P2
P3
P4
P5
P6
P7
CSO
HSO
V
AA
GND
V
AA
SCLOCK
SDATA
R
SET2
ADV7172/ADV7173
DAC F
COMP1
DAC A
V
AA
DAC B
V
AA
GND
V
AA
DAC C
DAC D
V
AA
GND
DAC E
CLOCK
GND
V
AA
VSO
RESET
PAL
NTSC
CLAMP
TTXREQ
SCRESET/RTC
R
SET1
V
REF
COMP2
GND
TTX
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
ADV7172KST 0°C to 70°C Plastic Thin ST-48
Quad Flatpack
ADV7173KST 0°C to 70°C Plastic Thin ST-48
Quad Flatpack
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60

ADV7173KSTZ-REEL

Mfr. #:
Buy ADV7173KSTZ-REEL
Manufacturer:
Analog Devices Inc.
Description:
Video ICs PAL/NTSC Encoder w/ 6 DAC 10B
Lifecycle:
New from this manufacturer.
Delivery:
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