PCU9661 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 1 — 12 September 2011 44 of 52
NXP Semiconductors
PCU9661
Parallel bus to 1 channel UFm I
2
C-bus controller
15. Test information
Test data are given in Tab le 34.
R
L
= load resistance.
C
L
= load capacitance includes jig and probe capacitance.
R
T
= termination resistance should be equal to the output impedance Z
O
of the pulse generators.
Fig 26. Test circuitry for switching times
Table 34. Test data
Test Conditions Load S1
C
L
R
L
t
d(DV)
, t
d(QZ)
Dn outputs active LOW 50 pF 500 V
DD
2
Dn outputs active HIGH 50 pF 500 open
Test data are given in Tab le 35.
R
L
= load resistance.
C
L
= load capacitance includes jig and probe capacitance.
R
T
= termination resistance should be equal to the output impedance Z
O
of the pulse generators.
Fig 27. Test circuitry for open-drain switching times
Table 35. Test data
Test Load S1
C
L
R
L
t
as(int)
50 pF 1 k V
DD
t
das(int)
50 pF 1 k V
DD
PULSE
GENERATOR
V
O
C
L
50 pF
R
L
500 Ω
002aac694
R
T
V
I
V
DD
DUT
R
L
500 Ω
V
DD
× 2
open
V
SS
PULSE
GENERATOR
V
O
C
L
50 pF
R
L
1 kΩ
002aac695
R
T
V
I
V
DD
DUT
V
DD
open
V
SS
